Test: Adders - 1 - Electrical Engineering (EE) MCQ

The basic block diagram for a Full Adder is as shown:

A full adder can be implemented using 2 XOR, 2 AND, 1 OR

Add two bit:

A = A₁ A₀

B = B₁ B₀

A₀ + B₀ will give carry C_in → using half adder 

Now using full adding Add C_in + A₁ + B₁

Half Adder using NAND Gates:

The half adder can also be designed with the help of NAND gates. NAND gate is considered as a universal gate. A universal gate can be used for designing any digital circuitry. It is always simple and efficient to use the minimum number of gates in the designing process of our circuit. The minimum number of NAND gates required to design a half adder is 5.

• The first NAND gate takes the inputs which are the two 1-bit numbers.
• The resultant NAND-operated inputs will be again given as input to 3- NAND gates along with the original input. 
• Out of these 3 NAND gates, 2-NAND gates will generate the output which will be given as input to the NAND gate connected at the end.
• The gate connected at the end will generate the 

The Sum output bit of a full adder is given by:

Looking at the Full-Adder circuit, we can see that,

S = A ⊕ B ⊕ C

From full adder circuit,

C_out =  AB + C_in (A ⊕ B)

Now, logic gate for above boolean expression can be drawn as,

Connecting them to a NAND gate, we now have the Full-Adder NAND Equivalent.

Hence, 9 minimum number of NAND gates requires to implement A ⊕ B ⊕ C or Full-Adder circuit.

Half adder circuit:

half adder circuit has 2 inputs and 2 outputs.

A half adder circuit is basically made up of an AND gate and an XOR gate as shown below:

Sum (S) = A⊕B

Carry = A.B

The truth table is as shown:

Important Points:
A full adder circuit has three binary digit inputs (two input bits and one carry input bit) and two binary digit outputs, Sum bit and carry output bit.

A Full adder can be realized using two half adders as shown:

The truth table of a full adder logic is:

The Sum output bit of a full adder is given by:

S = A ⊕ B ⊕ C

The carry output bit of a full adder is given by:

X₁ = AB + BC + AC

Half Adder:  It is a logic circuit that performs addition on two binary digits. It produces a sum and carry.

Full Adder:

• It is a logic circuit that takes three inputs to perform addition.
• Two binary input and one carry-in input of the previous stage is used.
• It generates sum and carry (C-out). C-in is a carry from a less significant digit and c-out is a carry from the most significant bit.

Additional Information
If we want to add two n- bit binary adders then it requires 1 half adder and n-1 full adder to complete the circuit. So, in the given question to add 4- bit binary numbers requires 1 half adder and 3 full adders.

Concept:- Carry look-ahead adder

→ In the case of the parallel adder, the speed with which addition can be performed is governed by the time required for the carries to propagate or ripple through all of the stages of the adder.

The look–ahead–carry adder speeds up the process by eliminating this ripple carry delay.

→ It examines all the input bits simultaneously & also generates the carry-in bits for all the stages simultaneously.

 

→ Consider the circuit:-
S_i = P_i ⊕ C_i

& P_i = A_i ⊕ B_i

G_i = A_i ⋅ B_i

C_{i + 1} = P_i C_i + G_i

So, Statements A, B & C are correct only.

A half adder circuit is basically made up of an a AND gate with XOR gate as shown below:

• A half adder is also known as XOR gate because XOR is applied to both inputs to produce the sum
• Half adder can add only two bits (A and B) and has nothing to do with the carry
• If the input to a half adder has a carry, then it will neglect it and adds only the A and B bits
• That means the binary addition process is not complete and that's why it is called a half adder

Sum (S) = A⊕B, Carry = A.B

Full Adder:

Full Adder is the adder that adds three inputs and produces two outputs. The first two inputs are P and Q and the third input R is an input carry.

It is the advantage of full adder over half adder that it can take three inputs together and third input can be an input carry.

Full Adder Circuit:

Full Adder Truth Table:

Half adder:

Full adder:

Full Adder can be implemented using 2 half adders and OR gate as shown below.

The basic block diagram for a Full Adder is as shown:

A Full adder can be realized using two half adders as shown:

 

We, therefore, conclude that a full adder combinational circuit has 3 inputs and 2 outputs.

A full adder can be implemented using 2 XOR, 2 AND, 1 OR as shown in figure:

Important Point
The truth table of a full adder logic is:

S = A ⊕ B ⊕ C
The Sum output bit of a full adder is given by:

The carry output bit of a full adder is given by:

X1 = AB + BC + AC