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Test: Caches & Performance of Caches - Computer Science Engineering (CSE) MCQ


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20 Questions MCQ Test Computer Architecture & Organisation (CAO) - Test: Caches & Performance of Caches

Test: Caches & Performance of Caches for Computer Science Engineering (CSE) 2024 is part of Computer Architecture & Organisation (CAO) preparation. The Test: Caches & Performance of Caches questions and answers have been prepared according to the Computer Science Engineering (CSE) exam syllabus.The Test: Caches & Performance of Caches MCQs are made for Computer Science Engineering (CSE) 2024 Exam. Find important definitions, questions, notes, meanings, examples, exercises, MCQs and online tests for Test: Caches & Performance of Caches below.
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Test: Caches & Performance of Caches - Question 1

The reason for the implementation of the cache memory is ________

Detailed Solution for Test: Caches & Performance of Caches - Question 1

Answer: b
Explanation: This difference in the speeds of operation of the system caused it to be inefficient.

Test: Caches & Performance of Caches - Question 2

The effectiveness of the cache memory is based on the property of ________

Detailed Solution for Test: Caches & Performance of Caches - Question 2

Answer: a
Explanation: This means that the cache depends on the location in the memory that is referenced often.

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Test: Caches & Performance of Caches - Question 3

The temporal aspect of the locality of reference means

Test: Caches & Performance of Caches - Question 4

The spatial aspect of the locality of reference means

Detailed Solution for Test: Caches & Performance of Caches - Question 4

Answer: d
Explanation: The spatial aspect of locality of reference tells that the nearby instruction is more likely to be executed in future.

Test: Caches & Performance of Caches - Question 5

 The correspondence between the main memory blocks and those in the cache is given by _________

Detailed Solution for Test: Caches & Performance of Caches - Question 5

Answer: b
Explanation: The mapping function is used to map the contents of the memory to the cache.

Test: Caches & Performance of Caches - Question 6

The algorithm to remove and place new contents into the cache is called _______

Detailed Solution for Test: Caches & Performance of Caches - Question 6

Answer: a
Explanation: As the cache gets full, older contents of the cache are swapped out with newer contents. This decision is taken by the algorithm.

Test: Caches & Performance of Caches - Question 7

The write-through procedure is used

Detailed Solution for Test: Caches & Performance of Caches - Question 7

Answer: c
Explanation: When write operation is issued then the corresponding operation is performed.

Test: Caches & Performance of Caches - Question 8

The bit used to signify that the cache location is updated is ________

Detailed Solution for Test: Caches & Performance of Caches - Question 8

Answer: a
Explanation: When the cache location is updated in order to signal to the processor this bit is used.

Test: Caches & Performance of Caches - Question 9

The copy-back protocol is used

Detailed Solution for Test: Caches & Performance of Caches - Question 9

Answer: b
Explanation: This is another way of performing the write operation,wherein the cache is updated first and then the memory.

Test: Caches & Performance of Caches - Question 10

The approach where the memory contents are transfered directly to the processor from the memory is called ______

Test: Caches & Performance of Caches - Question 11

 The key factor/s in commercial success of a computer is/are ________

Detailed Solution for Test: Caches & Performance of Caches - Question 11

Answer: d
Explanation: The performance and cost of the computer system is key decider in the commercial success of the system.

Test: Caches & Performance of Caches - Question 12

The main objective of the computer system is

Detailed Solution for Test: Caches & Performance of Caches - Question 12

Answer: b
Explanation: An optimal system provides best performance at low costs.

Test: Caches & Performance of Caches - Question 13

 A common measure of performance is

Detailed Solution for Test: Caches & Performance of Caches - Question 13

Answer: a
Explanation: If this measure is less than one then the system is optimal.

Test: Caches & Performance of Caches - Question 14

The performance depends on

Detailed Solution for Test: Caches & Performance of Caches - Question 14

Answer: b
Explanation: The performance of a system is decided by how quick an instruction is brought into the system and executed.

Test: Caches & Performance of Caches - Question 15

The main purpose of having memory hierarchy is to

Detailed Solution for Test: Caches & Performance of Caches - Question 15

Answer: d
Explanation: By using the memory Hierarchy, we can increase the performance of the system.

Test: Caches & Performance of Caches - Question 16

The memory transfers between two variable speed devices is always done at the speed of the faster device. 

Test: Caches & Performance of Caches - Question 17

An effective to introduce parallelism in memory access is by _______

Detailed Solution for Test: Caches & Performance of Caches - Question 17

Answer: a
Explanation: Interleaving divides the memory into modules.

Test: Caches & Performance of Caches - Question 18

 The performance of the system is greatly influenced by increasing the level 1 cache.

Detailed Solution for Test: Caches & Performance of Caches - Question 18

Answer: a
Explanation: This is so because the L1 cache is onboard the processor.

Test: Caches & Performance of Caches - Question 19

Two processors A and B have clock frequencies of 700 Mhz and 900 Mhz respectively. Suppose A can execute an instruction with an averageof 3 steps and B can execute with an average of 5 steps.For the execution of the same instruction which processor is faster

Test: Caches & Performance of Caches - Question 20

If the instruction Add R1, R2, R3 is executed in a system which is pipelined, then the value of S is (Where S is term of the Basic performance equation)

Detailed Solution for Test: Caches & Performance of Caches - Question 20

Answer: c
Explanation: Pipelining is a process of fetching an instruction during the execution of other instruction.

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