The reason for the implementation of the cache memory is ________
The effectiveness of the cache memory is based on the property of ________
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The temporal aspect of the locality of reference means
The spatial aspect of the locality of reference means
The correspondence between the main memory blocks and those in the cache is given by _________
The algorithm to remove and place new contents into the cache is called _______
The bit used to signify that the cache location is updated is ________
The approach where the memory contents are transfered directly to the processor from the memory is called ______
The key factor/s in commercial success of a computer is/are ________
The main objective of the computer system is
The main purpose of having memory hierarchy is to
The memory transfers between two variable speed devices is always done at the speed of the faster device.
An effective to introduce parallelism in memory access is by _______
The performance of the system is greatly influenced by increasing the level 1 cache.
Two processors A and B have clock frequencies of 700 Mhz and 900 Mhz respectively. Suppose A can execute an instruction with an averageof 3 steps and B can execute with an average of 5 steps.For the execution of the same instruction which processor is faster
If the instruction Add R1, R2, R3 is executed in a system which is pipelined, then the value of S is (Where S is term of the Basic performance equation)
20 videos|86 docs|48 tests
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20 videos|86 docs|48 tests
|