Test: Electronic Devices - 2 - Electronics and Communication Engineering (ECE) MCQ

1. Key Concepts:

• Flat-band voltage ($V_{fb}$): The gate voltage at which there is no band bending in the semiconductor, and the depletion region width is zero ($W_{\text{dep}} = 0$).
• Threshold voltage ($V_t$): The gate voltage at which the inversion layer forms, and the depletion region width reaches its maximum.
• Depletion width ($W_{\text{dep}}$): The width of the region in the semiconductor where mobile carriers are depleted under the influence of an electric field.

2. Depletion Width Regions:

• Region 1: $V_g < V_{fb}$: In this region, the gate voltage is insufficient to bend the bands, and the depletion region does not form:

  $$W_{\text{dep}} = 0$$

• Region 2: $V_{fb} < V_g < V_t$: In this region, as $V_g$ increases, a depletion region begins to form, and its width increases with the gate voltage. The depletion width is given by:

  $$W_{\text{dep}} = \sqrt{\frac{2 \epsilon_s}{q N_d} (V_g - V_{fb})}$$

  Where:

  • $\epsilon_s$: Permittivity of the semiconductor,
  • $q$: Charge of an electron ($1.6 \times 10^{-19} \, C$),
  • $N_d$: Doping concentration of the semiconductor.

• Region 3: $V_g > V_t$: Once the gate voltage exceeds the threshold voltage, the depletion width saturates and becomes constant. This is because any further increase in $V_g$ causes the formation of an inversion layer, preventing further expansion of the depletion region:

  $$W_{\text{dep}} = W_{\text{dep, max}}$$

  $W_{\text{dep, max}}$ is determined by:

  $$W_{\text{dep, max}} = \sqrt{\frac{2 \epsilon_s}{q N_d} (V_t - V_{fb})}$$

3. Example Substitution:

Let’s assume typical values:

• $\epsilon_s = 1.05 \times 10^{-12} \, F/m$ (for silicon),
• $q = 1.6 \times 10^{-19} \, C$,
• $N_d = 10^{16} \, \text{cm}^{-3} = 10^{22} \, \text{m}^{-3}$,
• $V_{fb} = -1 \, V$,
• $V_t = 1 \, V$,
• $V_g = 0.5 \, V$ (in the depletion region).

Calculation:

1. For $V_{fb} < V_g < V_t$ ($V_g = 0.5 \, V$):

   $$W_{\text{dep}} = \sqrt{\frac{2 (1.05 \times 10^{-12})}{(1.6 \times 10^{-19}) (10^{22})} (0.5 - (-1))}$$

   Simplifying:

   $$W_{\text{dep}} = \sqrt{\frac{2.1 \times 10^{-12}}{1.6 \times 10^{3}} \cdot 1.5}$$ $$W_{\text{dep}} = \sqrt{1.96875 \times 10^{-15}}$$ $$W_{\text{dep}} \approx 1.4 \times 10^{-8} \, \text{m} = 14 \, \text{nm}$$

2. For $V_g > V_t$ ($V_g = 2 \, V$):

   $$W_{\text{dep}} = W_{\text{dep, max}} = \sqrt{\frac{2 (1.05 \times 10^{-12})}{(1.6 \times 10^{-19}) (10^{22})} (1 - (-1))}$$

   Simplifying:

   $$W_{\text{dep, max}} = \sqrt{\frac{2.1 \times 10^{-12}}{1.6 \times 10^{3}} \cdot 2}$$ $$W_{\text{dep, max}} = \sqrt{2.625 \times 10^{-15}}$$ $$W_{\text{dep, max}} \approx 1.62 \times 10^{-8} \, \text{m} = 16.2 \, \text{nm}$$

4. Interpretation of Results:

• When $V_g < V_{fb}$: $W_{\text{dep}} = 0$,
• When $V_{fb} < V_g < V_t$: $W_{\text{dep}} = 14 \, \text{nm}$ (increases with $V_g$),
• When $V_g > V_t$: $W_{\text{dep}} = 16.2 \, \text{nm}$ (saturates).

Given, two transistors T₁ and T₂ which are identical in all respects except for width and gate overdrive voltage (V_GS - V_th).
For T₁ MOSFET,

g_m1 ∝ W₁ (V_GS - V_th)₁  and  I_D1 ∝ W₁ (V_GS - V_th)²₁

Similarly for T₂, g_m2 ∝ W₂ (V_GS - V_th)₂  and  I_D2 ∝ W₂ (V_GS - V_th)²₂

Given W₂ = 2W₁,

And (V_GS - V­_th)₂ = 2 (V_GS - V_th)₁

Putting these in Equation (1), we get,

Similarly,

g_m2 = 4g_m

According to charge neutrality,

RLmin to turn-on the zener diode 

For the fabrication of semiconductor laser diode, direct band gap type semiconductor is required

- In the given condition V_GS > V_TH and V_DS > (V_GS - V_TH), the MOSFET operates in the saturation region.
- In the saturation region, the MOSFET behaves as a current source.
- Channel length modulation affects the output characteristics, making the output impedance finite rather than infinite, as the drain current \(I_D) depends on ( V_DS).
- Therefore, the MOSFET acts as a current source with finite output impedance, which corresponds to option C.

If β is large then transistor will be in S.R

Just at onset of saturation,

Transistor is switch in inverter operation.

For the given figure,

Let x be the voltage at node A.

Now, V_DS2 = 3 − x

V_GS2 − V_t = 2.5 − x − 1

= 1.5 - x

We observe that, V_DS2 is always > V_GS2 − V_t

So, M₂ will always be in saturation.

Assuming M₁ to be in saturation, we calculate the saturation current as shown.

(I_DSat)₁ = (I_DSat)₂

⇒ K_n(V_GS - V_t)²₁ = K_n (V_GS - V_t)²₂

⇒ (2 - 1)² = (2.5 - x - 1)²

⇒ 1 = 1.5 - x

x = 0.5 V

If ‘x’ were to be 0.5 V then for M₁,

V_DS = x - 0 = 0.5 V

and V_GS - V_t = 1 V

So, V_DS < V_GS - V_t

This shows that our assumption is wrong, and M₁ cannot be in saturation.

So, M₁ is in cut off.

⇒ If P = high:

PMOS is OFF

NMOS is ON 

then y = Q̅

⇒If P = low

PMOS is ON

NMOS is OFF 

then  y = Q

The truth table of the above will be as shown:

= P ⊕ Q

So, Ex – OR Operation is being performed. 

When the semiconductor in a MOS is in inversion, the intrinsic energy level crosses over Fermi level and goes as deep into the other side of Fermi at the interface as distant it is from the Fermi level in the bulk.

Here, the intrinsic Femi level is below E_FS by ϕ_B in the bulk and above E_FS by ϕ_B at the interface. Thus the MOS is in inversion.