Addressing Modes (Basic Level)- 1


10 Questions MCQ Test Mock Test Series - Computer Science Engg. (CSE) GATE 2020 | Addressing Modes (Basic Level)- 1


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QUESTION: 1

Match List-I with List-ll and select the correct answer using the codes given below the lists:
List-I

List- II 
1. immediate
2. Register
3. Displacement
Codes:

Solution:


Here contents of Regs [R4] and [R3]
are added and placed into Register [R4
which is a register operation.

Here 3 is data instead of address
Hence, it is a immediate mode.

QUESTION: 2

The register which keeps track of the execution of a program and which contains the memory address of the instruction which is to be executed next is known as ______ .

Solution:

Program counter is the register which keeps track of the execution of a program and which contains the memory address of the instruction which is to be executed next by the processor.

QUESTION: 3

In case of vectored interrupt, interrupt vector means

Solution:

In a vectored interrupt, the source that interrupts supplies the branch information to the computer. This information is called the interrupt vector. In. some computers the interrupt vector is an address that points to a location in memory where the beginning address of the Input Output service routine is stored.

QUESTION: 4

Consider the following I/O instruction format for IBM 370 I/O channel 

Then operation code specifies
1. Test I/O
2. Test channel
3. Store channel identification
4. Halt device

Solution:

The operation code specifies one of eight input output instructions: Start input/output, start input/ output fast release, test input/output, clear input/ output, halt input/output, halt device, test channel and store channel identification.

QUESTION: 5

Match List-I with List-ll and select the correct answer using the codes given below the lists:

Solution:

3 address instruction:
Two operand locations and a result location are explicitly contained in the instruction word, 
e.g, Y = A - B
2 address instruction:
One of the addresses is used to specify both an operand and the result location,
e.g, Y = Y + X
1 address instruction:
Two addresses are implied in the instruction and accumulator based operations, 
e.g. ACC = ACC + X
0 address instructions:
They are applicable to a special memory organization called a stack. It interact with a stack using push and pop operations. All addresses are implied as in register based operations
T = Top ( T - 1 )

QUESTION: 6

In a certain processor, a 2 byte Jump instruction is encountered at memory address 3010 H, the Jump instruction is in PC relative mode. The instruction is JMP - 7 where - 7 is signed byte. Determine the Branch Target Address 

Solution:

The Jump instruction is at address 3010 H and instruction is 2 bytes. Therefore, PC points to 3012 H on execution of this instruction.
Now Branch Target PC
= PC + (-7)
= 3012 H - 7 H = 3005 H

QUESTION: 7

Relative Addressing Mode is used to write Position-independent code because

Solution:

The address reference is not absolute, it is relative to current location and therefore .these programs are easy to relocate in the memory of the computer.

QUESTION: 8

 The immediate addressing modes can be used for ______
1. Loading internal registers with initial value.
2. Perform arithmetic or logical operation on immediate data.

Solution:

Immediate addressing modes can be used for either loading internal register with initial value or perform arithmetic or logical operation on immediate data.

QUESTION: 9

Processor XYZ supports only the immediate and the direct addressing modes. Which of the following programming language data structures cannot be implemented on this processors?
1. Pointers
2. Arrays
3. Record

Solution:

To access pointer, arrays and records we need indirect addressing modes, so with direct and immediate addressing modes we cannot implement these.

QUESTION: 10

The register which contains the data to be written into or read out of the addressed location is known as

Solution:

MDR register needed to read or written data into or onto memory location.

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