Analog Electronics - 3 - Electrical Engineering (EE) MCQ

The MOSFET current is saturation is given by,

V_GS = 0.65 V_p

The drain current of JFET is given as

The Cut off gate voltage is also known as pinch off voltage at which the drain current becomes zero.

The bias used in the given circuit is voltage divider bias. The gate voltage 

∴ Gate source voltage V_GS = V_G - V_S

= 8 – 5

= 3 V

∴ I_D = ½ (3 - 0.75)² mA

≅ 2.53 mA

V_S = R_SI_D

The gain of the amplifier is given by:

A_v = - g_mr_D

g_m: trans conductance of transistor

r_D: effective AC resistance seen by drain terminal

g_m = 6.66 ms

r_D = R_D||R_L = 6k||6k = 3 kΩ

A_v = -6.66 × 10^-3 × 3 × 10³

A_v = -19.98 ≈ 20

Let I_D be the drain current, it will be common for all three transistors. All the transistors are operating in saturation since V_D = V_G

At transistor Q₃



Given I_D = 120 μA

⇒ W₂ = 2 μm

The Ac equivalent circuit can be drawn as

I_D = 0.25 mA; V_A = 50 V; V_ov (= V_Gs - V_T) = 0.25 V

(∵ r_O >> R_D)

= -36.36 V/V

A_v(Overall gain) = -g_m(R_D || r_O || R_L)

= -2 mΩ^-1 × 9.53 kΩ

≃ -19 V/V

Assume the transistor in saturation,

 

Assumption is correct.

Hence V_DS = 2.85 V.

Since V_DS = V_GS the device is in saturation

 

= 40 × 10^-6 (2 - 1)

Hence small signal resistance

= 25 kΩ

The small signal equivalent circuit is as shown below