GATE Mock Test Electronics Engineering (ECE)- 8 - Electronics and Communication Engineering (ECE) MCQ

# GATE Mock Test Electronics Engineering (ECE)- 8 - Electronics and Communication Engineering (ECE) MCQ

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## 65 Questions MCQ Test GATE ECE (Electronics) 2024 Mock Test Series - GATE Mock Test Electronics Engineering (ECE)- 8

GATE Mock Test Electronics Engineering (ECE)- 8 for Electronics and Communication Engineering (ECE) 2024 is part of GATE ECE (Electronics) 2024 Mock Test Series preparation. The GATE Mock Test Electronics Engineering (ECE)- 8 questions and answers have been prepared according to the Electronics and Communication Engineering (ECE) exam syllabus.The GATE Mock Test Electronics Engineering (ECE)- 8 MCQs are made for Electronics and Communication Engineering (ECE) 2024 Exam. Find important definitions, questions, notes, meanings, examples, exercises, MCQs and online tests for GATE Mock Test Electronics Engineering (ECE)- 8 below.
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GATE Mock Test Electronics Engineering (ECE)- 8 - Question 1

### A die is thrown twice. What is the probability of getting a sum 7 from both the throws ?

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 1
(1,6),(6,1) = 2

(2,5),(5,2) = 2

(3,4),(4,3) = 2

Desirable outcomes = 6

Total Outcomes in two dices = 36

Probability of sum 7 = 6/36

= 1/6

GATE Mock Test Electronics Engineering (ECE)- 8 - Question 2

### Find the sentence that has a mistake in grammar or usage. If you find no mistake, mark choice 4.

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 2
The correct verb form is 'has broken'.
GATE Mock Test Electronics Engineering (ECE)- 8 - Question 3

### In the following question, some part of the sentence may have errors. Find out which part of the sentence has an error and select the appropriate option. If a sentence is free from error, select ‘No Error’.I suppose no place is more (1)/ better than (2)/ home on Christmas. (3)/ No error (4)

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 3
The error is in part (1) of the sentence. The use of "better" signifies that the sentence is of comparative degree.

So, the use of "more" is incorrect here as it is redundant to be used with "better". So, remove "more".

GATE Mock Test Electronics Engineering (ECE)- 8 - Question 4

Directions: The following verbal analogy has two parts. One part is complete while the other one is incomplete. Complete the portion that is incomplete by selecting the right choice from the given options.

Son : Nuclear : : ______ : Extended

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 4
A son is part of a nuclear family, and a cousin is part of an extended family.
GATE Mock Test Electronics Engineering (ECE)- 8 - Question 5

Direction: In the following question, a sentence, with a part of it missing and represented by a blank is given. Select the best out of the five answer choices given, to make the sentence complete and coherent (coherent means logically complete and sound).

__________ or else they would not keep electing him year after year.

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 5
This type of questions needs to be solved on the basis of the contextual appropriateness of the phrase and the statement formed after the placement of the phrase into the statement.

Option A is inaccurate because a mayor is not elected by the leaders but by the people. The use of pronoun 'they' is ambiguous, as it the subject 'the party leader' is singular.

Option B makes no sense in the context of the statement, as having scandals, told to resign and getting elected repeatedly is not at all factually connected.

Option C is incorrect in the context of the statement, because the mayor can't threaten the residents who would be involved in his election year after year.

GATE Mock Test Electronics Engineering (ECE)- 8 - Question 6

Directions: Choose the sentence that best combines the given sentences.

The federal government has diversity of jobs and geographic locations. The federal government offers flexibility in job opportunities that is unmatched in the private sector.

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 6
The subordinator 'because' in choice 3 establishes the logical causal relationship between the subordinate and main clause. Choices 1 and 2 do not make sense. Choice 4 has faulty construction.
GATE Mock Test Electronics Engineering (ECE)- 8 - Question 7

Direction: Study the information carefully and answer the questions given below.

P is standing north of Q at a distance of 6m. R is standing toward east of P at a distance of 6m. R is to the north of S and distance between them is 6m. P is facing north direction, R is facing east, S is facing North and Q is facing towards west direction. All of them walk straight for 3m.

What is the distance between the final position of P and Q?

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 7

Let T be the final position of P and L be the final position of Q.

GATE Mock Test Electronics Engineering (ECE)- 8 - Question 8

The first term of an AP is equal to the sum of the common ratio of a GP and the first term of the GP, which is equal to the common difference of the AP. If the sum of the first two terms of the GP is equal to the sum of the first 2 terms of the AP, then the ratio of the first term of the GP to the first term of the AP is

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 8
We know that the three term of the AP are α - β, α, α + β and those of the GP are a, ar, ar2.

So, according to the quesition,

α - β = r + a = β

a + ar = 2α - β

a + ar = 2α - 2β + β

a+ar = 2

a(1 + r) = 2 (r + a) + r + a

a(1+ r) = 3 (r + a)

a + r = a(1 + r)/3

Now, the required ratio is a/α - β = a/(a + r) = (a × 3)/(a (1 + r)) = 3/(1 + r)

This is independent of the first term of the GP.

GATE Mock Test Electronics Engineering (ECE)- 8 - Question 9

In a class test, A scored 51 marks. The test had 4 sections. In the second section, A scored 7 marks more than in the first section, and in the third section, A scored 7 marks more than in the second section. If A did not score at all in the fourth section, how much did A score in the second section?

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 9
If A scored x marks in section 2, he scored (x-7) marks in section 1 and (x+7) marks in section 3.

(x-7) + x + (x+7) + 0 = 51

⇒ 3x = 51

⇒ x = 17

GATE Mock Test Electronics Engineering (ECE)- 8 - Question 10

Ramu is planning to get wireless internet service at his house. Two service providers A and B offer different rates as shown in the table below.

If Ramu plans on using 25 hours of internet service per month, which of the following statements is true?

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 10
When used for 25 hours per month, provider A will cost \$20 + 7.5 x \$1 (for the hourly charge above the free hours).

This equals \$27.50.

Provider B will cost \$20 + 5 x \$1.50 (for the hourly charge above the free hours).

This equals \$20 + \$7.50 = \$27.50 as well.

GATE Mock Test Electronics Engineering (ECE)- 8 - Question 11

Find the unit normal vector of the cone of revolution z2 = 9x2 + 15y2 −  z2 at a point (1,0,3)

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 11

The unit normal vector is the grad of f = 9x2 + 15y2 − z2

Unit normal vector,

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 8 - Question 12

Let Q√γ be the BER of a BPSK system over an AWGN channel with twosided noise power spectral density N0/2. The parameter γ is a function of bit energy and noise power spectral density.

A system with two independent and identical AWGN channels with noise power spectral density N0/2 is shown in the figure. The BPSK demodulator receives the sum of outputs of both the channels.

BER of this system is Q(b√γ ), then the value of b is ________.(Answer up to three decimal places)

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 12

Bit error rate for BPSK

⇒ Y = 2E/No

Function of bit energy and noise

Counterllation diagram of BPSK

Channel is AWGN which implies noise sample as independent

Let 2x +n1+ n2 = x1 + n1

where x1 = 2x

n1 = n1 + n2

E1 is energy in x1

No1 is PSD of h1

E1 = 4E [as amplitudes are getting doubled]

No1 = No [independent and identical channel]

GATE Mock Test Electronics Engineering (ECE)- 8 - Question 13

The transfer function of a system is 10/(s2+2s+10). Find the nature of the given system.

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 13
On comparing the given characteristic equation with the standard second order transfer function,

ωn2/(s2 + 2ζωns + ωn2).

Hence, ωn2 = 10 ; 2 ζωn = 2⇒ ζ = 0.316

For 0 < ζ < 1, the system is said to be Under-damped.

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 8 - Question 14

The surface ρ = 2, ρ = 4, Φ = 45°, Φ = 135°, z = 3 and z = 4 define a closed surface. The total area of the enclosing surface is _____. (Answer up to two decimal places)

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 14

GATE Mock Test Electronics Engineering (ECE)- 8 - Question 15

There are two energy levels E1 and E2 . E1 is E eV above the fermi level and E2 is E eV below the fermi level.

P1 = the probability of E1 being occupied by an electron.

P2= the probability of E2 being empty.

Then, which of the following is correct?

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 15
The Fermi- Dirac probability function also called Fermi function, provides the probability of occupancy of energy levels. It is given by

where EF is Fermi level or Characteristics energy, for the crystal in eV. The fermi level represents the energy state with 50 percent probability of being filled if no forbidden band exists.

Therefore, P1 And P2 can be calculated by using Fermi- Dirac probability function.

For P1

For P2

therefore,

P1 < />2

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 8 - Question 16

For a Hertz dipole antenna, the half power beam width (in degrees) in the E-plane is _____.(Answer up to the nearest integer)

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 16
The beam-width of Hertzian dipole is 180° and its half power beam-width is 90°.
*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 8 - Question 17

Consider the circuit shown in the figure below

v(t) = 80e−1000tV ;t>0

i(t) = 5e−1000tmA ;t>0

the energy dissipated (in μ) by the resistor for 0 < t < 0.6 ms will be approximately

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 17

The energy dissipated in the resistance is

E = 200(1−e−1.2)μJ

E = 139.76 pJ

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 8 - Question 18

A die is thrown 100 times. Getting an even number is considered a success. The variance of the number of successes is ______ (Answer up to the nearest integer)

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 18
Here p = 3/6 = 1/2, q = 1 - 1/2 = 1/2 & n = 100

Thus variance = npq = 100 × 1/2 × 1/2 = 25

GATE Mock Test Electronics Engineering (ECE)- 8 - Question 19

While analysing a two-port network, which of the following parameters are obtained when one-port variables are expressed in terms of the other port variables?

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 19
Expressing one port variables in terms of the other port variables,

(V1,I1) = f(V2,−I2)

The parameters so obtained are the T-parameters or the ABCD-parameters.

These are used for the analysis of the power transmission line. The input and output ports are the sending and the receiving ends respectively.

GATE Mock Test Electronics Engineering (ECE)- 8 - Question 20

By simplifying the given Boolean function, Y = ABC + A'B + ABC' + AC, the minimum number of literals is

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 20
Y = ABC + A'B + ABC' + AC

= AB(C + C') + A'B + AC

= AB + A'B + AC = (A + A')B + AC = B + AC

So, the number of literals is 3.

GATE Mock Test Electronics Engineering (ECE)- 8 - Question 21

The impulse response of a second order under damped system starting from rest is given by C(t) = 12.5e-8tcos6t

What are the responsive value of natural frequency and damping ratio of the system?

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 21
C(t) = 12.5e8tcos⁡6t,t > 0

T.F = L{C(t} = 12.5(s−(−8))/(s−(−8))2+62)

TfF = (12.5s+100)/(s2+16s+100)

Comparing with s2+2ξωnn2

ωn2 = 100→ωn = 10

2ξωn = 16→ξ = 0.8

GATE Mock Test Electronics Engineering (ECE)- 8 - Question 22

Which of the following conversions is performed by the circuit shown in figure?

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 22
y3 = x3 (MSB)

y2 = x3 ⊕x2,y1 = y2 ⊕ x1, y0 = y1 ⊕ x0

So, the conversion is gray code to Binary code

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 8 - Question 23

For the CE amplifier shown, calculate value of lower cutoff frequency FL (in Hz) due to C2

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 23
Rc = 200Ω,Cb = ∞

C2 = Cc = 4.2μF and Rs = 1KΩ

Now Re⁡q = Ro, + RL = 1K + 200Ω = 1.2KΩ

GATE Mock Test Electronics Engineering (ECE)- 8 - Question 24

The phenomenon known as "Early Effect" in a bipolar transistor refers to a reduction of the effective base-width caused by

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 24
In BJT, as the B-C reverse bias voltage increases, the B-C space charge region width increases, where xB (i.e. neutral base width) > A. Change in neutral base width will change the collector current. A reduction in base width will cause the gradient in minority carrier concentration to increase, which in turn will cause an increase in the diffusion current. This effect is known as "Early Effect".
*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 8 - Question 25

Calculate the hysteresis width (in Volts) for an inverting Schmitt trigger with feedback fraction 0.5. Assume the supply voltage to be 10V.

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 25
For a inverting Schmitt trigger.

Given: β = 0.5, Vcc = 10V

Hysteresis Voltage VH = VUT - VLT

VUT = +β x Vcc

VLT = -β x Vcc

VH = 2 x β x Vcc

VH = 2 x 0.5 x 10

VH = 10V

GATE Mock Test Electronics Engineering (ECE)- 8 - Question 26

Consider the following graphs:

Which of the these graphs is/are non-planar?

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 26

Other three circuits can be drawn on plane without crossing as shown below.

GATE Mock Test Electronics Engineering (ECE)- 8 - Question 27

When a relatively small d.c. voltage is applied across a thin slice of Gallium Arsenide with thickness of order of few tenths of a micrometer and the voltage gradient across the slice is in excess of about 3300 V/cm, then the negative resistance will manifest itself. Which of the following devices operate based on the above phenomenon?

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 27
The above-mentioned phenomenon occurs in Gunn diode and it is called the GUNN EFFECT. Gunn Effect is exhibited by semiconductor materials like gallium arsenide, indium phosphide, cadmium telluride and indium arsenide.
GATE Mock Test Electronics Engineering (ECE)- 8 - Question 28

The current flowing through the resistance R in the given circuit has the form P cos 4t, where P is

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 28
Here the value of inductance is not given we can ignore it

I1 = 2cos 4t/3 = 0.67 cos 4 t i.e. ω = 4

= (0.23 - 0.35j)Cos 4 t

GATE Mock Test Electronics Engineering (ECE)- 8 - Question 29

In a superheterodyne AM receiver ,the image channel selectivity is determined by :

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 29
Image frequency rejection can be improved by placing more no of tank circuits, in between Antenna and the IF amplifier and by increasing their selectivity against image frequency.
GATE Mock Test Electronics Engineering (ECE)- 8 - Question 30

The approximate Bode magnitude plot of a minimum-phase system is shown in the figure. The transfer function of the system is

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 30
The given bode plot is shown below

At ω = 0.1 change in slope is + 60 dB → 3 zeroes at ω = 0.1

At ω = 10 change in slope is - 40 dB → 2 poles at ω = 10

At ω = 100 change in slope is -20 dB → 1 poles at ω = 100

Now 20 log10 K = 20

or K = 10

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 8 - Question 31

A 78 Ω lossless planar line was designed but did not meet a requirement . The fraction of the widths of strip (in %)should be added or removed to get the characteristic impedance of 75Ω is ___

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 31

i.e. the width must be increased by 4%.

GATE Mock Test Electronics Engineering (ECE)- 8 - Question 32

Consider the following values for the circuit shown below:

1. VR = 100√2V

2. I = 2A

3. L = 0.125 H

Which of the above values are correct?

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 32

GATE Mock Test Electronics Engineering (ECE)- 8 - Question 33

A 16 bit computer can address 1M word and has 128K words installed from 64K x 1 chips. Calculate the no. of chips required and no. of bits of address bus that allows to select the memory chips

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 33
As it is a 64K memory chips hence 16 bits are needed to address them

i.e. 64K = 216

As we want 128K × 16 from 64K × 1 chips

No. of chips = 128K×16/64K×1 = 32

Now as we have two rows of 16 chips each, we will need 1 bit to difference one row from another. So A16 will be used to select the memory chips

GATE Mock Test Electronics Engineering (ECE)- 8 - Question 34

The impulse response of an LTI system is h (t) = δ(2)(t). The step response is

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 34
For t < 0,="" s(t)="" />

GATE Mock Test Electronics Engineering (ECE)- 8 - Question 35

A minimized Boolean expression is a combination of

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 35
Points to Remember

The prime implicant which contains at least one 1 which cannot be covered by any other prime implicant is called an essential prime implicant (EPI).

The prime implicant whose each 1 is covered by at least one EPI is called Redundant prime implicant (RPI).

The prime implicant which is neither EPI nor RPI is called selective prime implicant (SPI).

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 8 - Question 36

f X (t) is a stationary process having a mean value E [X (t)] = 3 and auto correlation function Rxx (T) = 9 + 2e-[T]. The variance of random variable Y = dt will be ____. (Answer up to two decimal places)

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 36

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 8 - Question 37

Calculate the value of ∫0π/6 cos2⁡3θsin3⁡6θdθ.

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 37

Put 3θ = x

3dθ = dx

GATE Mock Test Electronics Engineering (ECE)- 8 - Question 38

Consider the following statements regarding capability curves of a synchronous generator:

2. The field current should not be allowed to exceed a specified value determined by field heating.

3. The MW loading should not exceed the rating of the prime mover.

4. The load angle must be more than 90°.

Which of the above statements are correct?

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 38

→ From the power curves, we can say that the syn M/C can't be loaded more than the maximum.

→ Field current should be in limits to avoid saturation of field.

→ Any loading shouldn't exceed the supply point Rating's (Generator, prime mover etc.)

GATE Mock Test Electronics Engineering (ECE)- 8 - Question 39

A poisson variate satisfies P(x = 1) = 0.5 P(x = 2). Then find the value of P(x = 4) is

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 39
P(x = 1) = 0.5P(x = 2)

λ = 4

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 8 - Question 40

In a material, the magnetic field intensity is H = 1200 A/m when B = 2 Wb/m2. When H is reduced to 400 A/m, B = 1.4 Wb/m2, the change in the magnetization M (in kA/m) is _______. (Answer up to the nearest integer)

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 40
For case 1,

Μ = B1/H = 2/1200

μr1 = μ/μ0

= 1326.3

xm = μr - 1 = 1325.3

M1 = xmH1 = 1.590 x 106 A/m

For case 2,

Μ = B1/H = 1.4/400

xm = μr - 1 = 2784.2

M2 = xmH2 = 1.114 x 106 A/m

Therefore,

ΔM = (1.590 - 1.114) x 106 = 476 kA/m

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 8 - Question 41

Study the standard negative feedback configuration with G(s)

= s2+0.2s+100/s2−0.2s+100 and H(s) =0.5. Find the number of clockwise encirclements of (-1, 0) in the Nyquist of the Loop transfer function G(s) H(s) will be

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 41
Given G(s) = s2+0.2s+100/s2−0.2s+100 and H(s) = 0.5

Characteristics equation

1+ G(s) H(s) = 0

3s2 - 0.2s + 300 = 0

The given system is unstable with two roots in right hand side of s-plane

So Z = 2

Also P = 2 since OLTF has two poles in right hand side of s-plane

So N = P - Z = 2 – 2 = 0

N = 0

Hence the number of clockwise encirclements of (-1, 0) in the Nyquist of the Loop transfer function G(s) H(s) is zero.

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 8 - Question 42

If u = , then the value of is (Answer up to the nearest integer)

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 42

Then u = v + w

Now v is homogeneous of degree zero and ω is homogeneous of degree one

..........(i)

GATE Mock Test Electronics Engineering (ECE)- 8 - Question 43

Which of the following signal is obtained on integrating ramp signal?

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 43

On integrating t, we get (1/2)t2 which is the amplitude of parabolic signal.

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 8 - Question 44

A single-phase, 230 V, 50 Hz AC mains fed fully controlled bridge rectifier is feeding a 200 V DC, 1500 rpm, 10 A separately excited DC motor with a ripple-free continuous current under all operating conditions. The armature resistance is 1 Ω and the motor torque is 15 N-m.

What will be the motor speed (in rpm) be at a firing angle of 30°?

(Answer up to one decimal place)

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 44

The armature terminal voltage under rated operating conditions of the separately excited d.c. motor

Vt = Ea+ Ia ra = Kmwm + IaRa ∴ Ea = Kmwm

For a torque of 15 Nm, motor armature current is given as

The equation giving the operation of converter mode is

Vo = Vt = Ea+ Iara

or 179.33 = 1.209ωm + 12.40

ωm = 2π x N/60 = 138.07

N = 1318.5 r.p.m

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 8 - Question 45

For a Si, one sided abrupt junction with NA = 2 × 1019/cm3 & ND = 8×1015/cm3 & ni = 9.65×109/cm3. The junction capacitance at zero bias is ______(in mF/cm2). Given, εr = 11.7

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 45

= 0.906 V

GATE Mock Test Electronics Engineering (ECE)- 8 - Question 46

Consider the following statements regarding corona:

2. It attenuates lightning surges.

3. It causes power loss.

4. It is more prevalent in the middle conductor of a transmission line employing flat conductor configuration.

Which of the above statements are correct?

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 46
Corona causes:

2. Power loss

3. It reduces the magnitude of lightning (&) switching

4. It is also more prevalent in the middle conductor in a flat conductor configuration.

GATE Mock Test Electronics Engineering (ECE)- 8 - Question 47

A semiconductor of thickness 0.5μm is illuminated with monochromatic light of hϑ = 2eV, and the absorption coefficient of semiconductor ⋅α = −5 × 104cm−1. If the incident power is 10mW ( Assume semiconductor has perfect quantum efficiency ) then number of photons given from recombination events per second is photons/sec ,

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 47
I = I0e−αl

= 10−2exp⁡(−5×10−4×0.5×10−4)

= 0.82mW

Total energy absorbed = 10 − 0.82 = 9.18mW

Number of photons emitted =

= 2.8687 × 1016 photons/sec

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 8 - Question 48

In the current mirror circuit shown below, the transistor parameters are VBE = 0.7 V, β = 50 and the Early voltage is infinite. Assume transistor are matched.

The output current Io (in μA) is _______. (Answer up to the nearest integer)

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 48
Since transistor are matched

VBE1 = VBE2,IB1 = IB2

Thus the circuit is as follows

Iref = IC1 + IB1 + IB2

Io = IC2,

GATE Mock Test Electronics Engineering (ECE)- 8 - Question 49

Calculate Zth across the terminals A and B:

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 49
To calculate Zth consider the diagram

Current source has been open circuited.

XL = jωL = sL =10s since L=10H

XC=1/jωC = 1/sC = 1/10s since C =10F

Therefore Zth= (XL+10)||( XC + 10)

= {(XL+10)* ( XC + 10)}/(20 + XL + XC)

= {(10 +10s)*(10 +1/10s)}/(20 + 10s +1/10s)

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 8 - Question 50

For a particular semiconductor material following parameters are observed:

μn = 1000 cm2/V - s, μp = 600 cm2/V - s, Nc = Nv = 1019 cm-3

These parameters are independent of temperature. The measured conductivity of the intrinsic material = 10-6 (Ω cm)-1 at T = 300 K. The conductivity (Ω cm)-1 at T = 500 K is ___ × 10-3 (Answer up to two decimal places)

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 50
σ1 = enin + μp)

10-6 = (1.6 x 10-19)(1000 + 600)ni

At T = 300 K, ni = 3.91 x 109 cm-3

Ni = 2.29 x 1013 cm-3

= (1.6 x 10-19)(2.29 x 1013)(1000 + 600)

= 5.86 x 10-3(Ω-cm)-1

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 8 - Question 51

Consider the causal discrete time system shown below, minimum magnitude of K for which system become unstable is

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 51

As shown in figure

Has pole at k/2 and for causal and stable pole should be inside unit circle so

1 − K/2 > 0

1 > K/2

|k/2| < 1

|k| < 2 (for stable system)

Hence for unstable system |k| ≥ 2

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 8 - Question 52

A uniformly doped silicon epitaxial npn bipolar transistor is fabricated with a base doping of NB = 3 x 1016 cm-3 and a heavily doped collector region with Nc = 5 x 1017 cm-3. The neutral base width is xB = 0.7 when VBE = VBC = 0.

The VBC (in V) at punch through is (Answer up to one decimal place)

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 52

At punch - through

GATE Mock Test Electronics Engineering (ECE)- 8 - Question 53

In the given oscillator circuit, find the values of C1 and C2 that would make the bridge balanced

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 53
Here, the given oscillator circuit is a Wein Bridge oscillator. The condition for the bridge to be balanced is,

R3/R4 = R1/R2 + C2/C1

Since, R1 = 10 kΩ, R2 = 1 kΩ, R3 = 2 kΩ and R4 = 100 Ω.

Then, C2/C1ratio would be 10:1.

C1 = 100 µF and C2 = 1 mF satisfies this ratio.

GATE Mock Test Electronics Engineering (ECE)- 8 - Question 54

Consider the following circuit:

The flip-flop are positive edge trigger red D FFs. Each state is designated as a two bit string Q0, Q1. Let the initial state be 00. The state transition sequence is

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 54
In the circuit

So , the state transition sequence Q0Q1 is

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 8 - Question 55

Two identical transistors are cascaded as follows with β = 100. The overall voltage gain would be

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 55
Here the identical BJTs are connected.

First we need to analyse this circuit and find out the DC voltages at first and second stages.

First Stage,

DC Voltage at Base of stage 1 = 10*(R2/(R1 + R2)) = 1.67 V.

VE1 = 1.67 – 0.7 = 0.97 V

IE1 = 0.97 V/4.5 kΩ = 0.22 mA

IC1 = 0.22 mA

VC1 = 10 – 0.22×20 = 5.6 V

Second Stage,

Base Voltage = 5.6 V

VE2 = 5.6 – 0.7 = 4.9 V

IE2 = 4.9 V/10 kΩ = 0.49 mA

VC2 = 10 – 0.49 * 10 = 5.1 V

Overall Voltage gain is given by,

Av = Av1 ∗ Av2

Voltage gain of first stage,

Av1= output impdance/Input impedance

Total output impedance of stage 1 is R3‖Zin. Where Zin is input impedance of second stage.

Total output impedance is R3‖Zin = 4.85kΩ

And Input impedance, re1 = VT/IE1 = 113.67Ω

Then voltage gain of first stage is

Av1 = 4.85kΩ/113.67Ω = 42.67

Voltage gain of second stage,

since there is no loading effect, Output Impedance = R5 = 10kΩ

Input impedance was found earlier, re2 = 51.02Ω

Av2 = 10kΩ/51.02Ω = 196

Overall Voltage gain is Av = Av1 * Av2 = 8363

GATE Mock Test Electronics Engineering (ECE)- 8 - Question 56

For the system shown below, the steady state error component due to unit step disturbance is 0.000012 and steady state error component due to unit ramp input is 0.003. The value of K1 and K2 are respectively

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 56
If R(s) = 0

Error in output due to disturbance

E(s) = TD(s)D(s),

If D(s) = 1/s,

3/2K1 = 0.000012 ⇒ K1 = 125 x 103

Error due to ramp input

GATE Mock Test Electronics Engineering (ECE)- 8 - Question 57

A load of 1 KΩ is connected to a diode detector which is shunted by a 10kpF capacitor. The diode has a forward resistance of 1 Ω. The maximum permissible depth of modulation, so as to avoid diagonal clipping and modulating signal frequency of 10kHz will be

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 57
We know,

Given, R = 1kΩ = 1000Ω

C = 10000pF = 10−8F

On putting these values in (1) we will get,

GATE Mock Test Electronics Engineering (ECE)- 8 - Question 58

The discrete Fourier transform of a discrete sequence x [n] is XDFT [k] = {1, 2, 3, 4} DFT of the sequence g [n] = x [n - 2] is

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 58
DFT of sequence g[n] is

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 8 - Question 59

In an air-filled rectangular waveguide with a = 2.286cm and b = 1.016cm , the y-component of the TE mode is given by

Then the intrinsic impedance (in Ω) is

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 59
since m = 2, n = 3 the mode is TE23

= 46.19 GHz, f ≈ 50 GHz

= 985.3 Ω

GATE Mock Test Electronics Engineering (ECE)- 8 - Question 60

In the circuit shown in figure, a battery of 6 V is charged by a 1-f one pulse thyristor controlled rectifier. A resistance R is to be inserted in series with the battery to limit the charging current to 4 A. The value of R is

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 60

Let the supply is Vs = Vmsinωt and battery emf is E. For the circuit voltage equation is

Vmsinωt = E + I0R

Since the SCR is turn on when Vmsin θ1 = E and is turned off when Vmsinθ2 = E, where

θ2 = π - θ1.

The battery charging requires only the average current I0 given by:

GATE Mock Test Electronics Engineering (ECE)- 8 - Question 61

The intermediate frequency of an AM superheterodyne receiver is 460kHz and the local oscillator frequency {fLO ) of the mixer is set at the higher of the two possible values, such that fLO > fc always. If the carries frequency {fC of the receiver signal is 700kHz, then the carrier frequency of the corresponding image signal will be kHz

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 61
Given that fc = 700 kHz

fIF = 460 kHz and fLO > fC

So, the carrier frequency of the corresponding image signal can be given as

fi = fC + 2fIF = 700 + 2(460)

fi = 1620 kHz

GATE Mock Test Electronics Engineering (ECE)- 8 - Question 62

A single-phase 230 V, 1 kW load is connected across single-phase 230 V, 50 Hz supply through a diode. The power delivered to the load and input power factor respectively are

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 62

RL = (230)2/1000 Ω

This is a half-rectifier circuit, so rms value of output voltage,

Input power factor

GATE Mock Test Electronics Engineering (ECE)- 8 - Question 63

Pick out the 'TRUE' from the following?

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 63
16’s complement of a Hex number = 2's complement of it

Ex: 7BH:- 15c => subtract each digit/symbol from F

16th complement of 7BH

FF -78 = 84+1 = 85H

78 H in 16th complement = 85 H

2's complement of 7B H

7BH = (01111011)2

2’s Complement 7B H = (10000101) = 85 H

So Option (A) is False because BCD = Binary only for ≤ 9

Option (B) is False because compliment of positive number is its magnitude only.

Option (C) is False because Gray code depends on binary but not on BCD.

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 8 - Question 64

Let g(x) =

Consider the composition of f and g, i.e., (f o g)(x) = f(g(x)). The number of discontinuities in (f o g)(x) present in the interval (-∞ , 0) is: (Answer up to the nearest integer)

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 64
Clearly (fog)(x) = is discontinuous at x = 1

∴ The number of discontinuities in (fog) (x) present in the interval (-∞ , 0) is 0

Alternative Method:

f(x) = 1 - x for x ≤ 0 and g (x) = - x for x < />

∴ Both f(x) and g(x) are continuous when x < />

⇒ (fog)(x) is also continuous for x < />

(Since the composite function of two continuous functions is continuous)

∴ The number of discontinuities in the interval (-∞, 0) i.e., x < 0="" is="" />

GATE Mock Test Electronics Engineering (ECE)- 8 - Question 65

Assuming that flip-flops are in reset condition initially, the count sequence observed at QA in the circuit shown is

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 8 - Question 65
Initially, QA = QB = QC = 0

DA = QB ⊕ QC = 0, DB = QA = 0

DC = QB = 0

After one clock pulse,

QA = 1, QB = 0, QC = 0

DA = QB⊕QC = 0

DB = QA = 1, DC = QB = 0

After two clock pulse,

QA = 1, QB = 1, QC = 0

DA = QB⊕QC = 1

DB = QA = 1, DC = QB = 1

After three clock pulses,

QA = 0, QB = 1, QC = 1

DA = QB⊕QC = 0

DB = QA = 0, DC = QB = 1

After four clock pulse,

QA = 1, QB = 0, QC = 1

DA = QB⊕QC = 1

DB = QA = 1, DC = QB = 0

After five clock pulse,

QA = 0, QB = 1, QC = 0

DA = QB⊕QC = 1

DB = QA = 0, DC = QB = 1

After six clock pulse,

QA = 0, QB = 0, QC = 1

Therefore, the count sequence observed at QA is 0010111.....

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## GATE ECE (Electronics) 2024 Mock Test Series

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