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Test: (Junction Field Effect Transistor) JFET - 2


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10 Questions MCQ Test Analog Electronics | Test: (Junction Field Effect Transistor) JFET - 2

Test: (Junction Field Effect Transistor) JFET - 2 for Electronics and Communication Engineering (ECE) 2023 is part of Analog Electronics preparation. The Test: (Junction Field Effect Transistor) JFET - 2 questions and answers have been prepared according to the Electronics and Communication Engineering (ECE) exam syllabus.The Test: (Junction Field Effect Transistor) JFET - 2 MCQs are made for Electronics and Communication Engineering (ECE) 2023 Exam. Find important definitions, questions, notes, meanings, examples, exercises, MCQs and online tests for Test: (Junction Field Effect Transistor) JFET - 2 below.
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Test: (Junction Field Effect Transistor) JFET - 2 - Question 1

Which of the following can be considered to be an advantage of FET amplifier as compared to BJT amplifier?
A – Higher input impedance
B – Good bias stability
C – Higher gain-bandwidth product
D – Lower noise figure
Select the correct answer using the codes given below
Codes:

Detailed Solution for Test: (Junction Field Effect Transistor) JFET - 2 - Question 1

Advantage of FET over BJT are
i) Higher input impedance
ii) Good bias stability
iii) Lower noise figure.

Test: (Junction Field Effect Transistor) JFET - 2 - Question 2

The pinch off voltage of JFET is 5v. What is its cut off voltage?

Detailed Solution for Test: (Junction Field Effect Transistor) JFET - 2 - Question 2

Pinch off voltage = 5V
At cut off the gate to source voltage of JFET is equal to pinch off voltage
Vgs = VP 
⇒ Vgs(off) = 5V.

Test: (Junction Field Effect Transistor) JFET - 2 - Question 3

Which of the following is the main advantage of Self bias?

Detailed Solution for Test: (Junction Field Effect Transistor) JFET - 2 - Question 3

Self bias eliminates the need of 2 power supply by connecting gate resistance to the supply voltage.

Test: (Junction Field Effect Transistor) JFET - 2 - Question 4

Which of the following is the necessary condition to design an amplifier?

Detailed Solution for Test: (Junction Field Effect Transistor) JFET - 2 - Question 4

In order to design an amplifier the time constant and RC and voltage across specified terminals.

Test: (Junction Field Effect Transistor) JFET - 2 - Question 5

Which of the following is the equation for stray capacitance frequency?

Detailed Solution for Test: (Junction Field Effect Transistor) JFET - 2 - Question 5

During high frequency the capacitance is due to combination of transmission capacitance and junction capacitance. The equation is given by FH = 1/27R.

Test: (Junction Field Effect Transistor) JFET - 2 - Question 6

Two identical FETs, each characterized by the parameters g_m and r_d are connected in parallel .The composite FET is then characterized by the parameters_____________

Detailed Solution for Test: (Junction Field Effect Transistor) JFET - 2 - Question 6

By converting FET into ac equivalent circuits and connecting them in parallel,
gn = 2gm and rn = rd/2.

Test: (Junction Field Effect Transistor) JFET - 2 - Question 7

The action of JFET in its equivalent circuit can be represented as which of the following?

Detailed Solution for Test: (Junction Field Effect Transistor) JFET - 2 - Question 7

In JFET equivalent circuit, the output current is controlled by the gate to source voltage and hence we can say it is a Voltage controlled current source.

Test: (Junction Field Effect Transistor) JFET - 2 - Question 8

At higher frequency, the capacitance of an amplifier circuit is mainly because of which capacitance?

Detailed Solution for Test: (Junction Field Effect Transistor) JFET - 2 - Question 8

During High frequency, the stray capacitance is the only source of capacitance in an amplifier circuit, the stray capacitance and junction capacitance.

Test: (Junction Field Effect Transistor) JFET - 2 - Question 9

What is the maximum value of gain of an amplifier?

Detailed Solution for Test: (Junction Field Effect Transistor) JFET - 2 - Question 9

The maximum gain of amplifier is 1000000.
When we consider this in decibel scale,
it gives 120dB
⇒ gain in dB = 20log10(100000)
= 120dB.

Test: (Junction Field Effect Transistor) JFET - 2 - Question 10

JFET is a

Detailed Solution for Test: (Junction Field Effect Transistor) JFET - 2 - Question 10

Concept:

  • JEFT stands for Junction Field Effect Transistor.
  • A field effect transistor is a voltage controlled device i.e. the output characteristics of the device are controlled by input voltage. There are two basic types of field effect transistors:

  1. Junction field effect transistor (JFET)

  2. Metal oxide semiconductor field effect transistor (MOSFET)

  • A JFET is a three terminal semiconductor device in which current conduction is by one type of carrier i.e. electrons or holes.
  • The current conduction is controlled by means of an electric field between the gate and the conducting channel of the device. To control the conduction of current from the source to the drain, the gate voltage must be more negative than the source voltage.
  • JEFTs are futher divided into two types that n-channel JEFT and p-channel JEFT. The three leads of a JEFT are labeled source, gate and drain. 
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