Test: Basic MOS Transistors - Electrical Engineering (EE) MCQ

 Electronics are characterized by reliability, low power dissipation, extremely low weight and volume, low cost, can cope up with high degree of sophistication and complexity.

nMOS devices are formed in a p-type substrate of moderate doping level. nMOS devices have higher mobility and is cheaper.

The source and drain regions are formed by diffusing n-type impurity, it gives rise to depletion region which extend in more lightly doped p-region. Thus Source and drain in a nMOS device are isolated by two diodes.

 In depletion mode, source and drain are connected by conducting channel but the channel can be closed by applying suitable negative voltage to the gate.

The condition for non saturated region is Vds lesser Vgs – Vt. In non saturation region MOSFET acts as voltage source. Varying Vds will provide significant change in drain current.

 In enhancement mode, the decive is in non conducting condition. For n-type FET, thershold voltage is positive and p-type threshold voltage is negative.

 In enhancement mode the device is in non conducting mode, and its condition is Vds = Vgs = Vs = 0.

 nMOS transistors are acceptor doped. Acceptor is a dopant which when added forms p-type region. Some of the accpetors are silicon, boron, aluminium etc.

 MOS transistor structure is completely symmetrical with respect to source and drain.

nMOS is acceptor doped and pMOS is donor doped devices. Acceptor doped forms p-type region and donor doped forms n-type region.

Inversion layer in enhancement mode consists of excess of negative carriers that is electron.

The condition for linear region is Vgs > Vt. The power of MOS in linear region is less. It is a power dissipating region.

As source drain voltage Vds increases, the channel depth at the drain end decreases.

MOS transistors is formed as a sandwich consisting of a semiconductor layer, a silicon-di-oxide layer and a metal layer.

MOS transistors is formed as a sandwich consisting of a semiconductor layer, a silicon-di-oxide layer and a metal layer.

In MOS transistors, polycrystalline silicon is used for their gate region instead of metal. Polysilicon gates have replaced all other older devices.

The gate region is a sandwich consisting of semiconductor layer, an insulating layer and an upper metal layer.

Electrical charge or current flows from source to drain depending on the charge applied to the gate region.

 Source and drain in the MOS transistors are doped with N-type material and substrate is doped with p-type material.

 In N channel MOSFET, source is the more negative of the elements and in the case of P channel MOSFET, it is the more positive of the elements.

If the gate is given sufficiently large charge, the negative charge carreirs, electrons will be attracted from the bulk of the substrate material into the channel region below the oxide.

 Enhancement mode transistor acts as open switch whereas depletion mode transistor acts as normally closed switch.

 Depletion mode MOSFETs are more commonly used as resistors than as switches. As permanently on switch it has high resistance.

 Enhancement mode MOSFETs are more commonly used as switches and depletion mode devices are more used as resistors.

Depletion mode transistors should be made large that is long and thin to create the large ‘on’ resistance.

When driving a capacitive output load, charging time will be long compared to the discharging time.

 When the number of resistors per unit area increases, the device may not dissipate heat very well. This results in device overheating which leads to its failure.

In all n channel MOSFET transistors, channel length is constant where as channel width can be varied.

Very-large scale integration is the process of creating integrated circuit with thousands of transistors into one single chip.