Test: DC Load Lines - Electrical Engineering (EE) MCQ

In transistor circuit analysis, sometimes it is required to know the collector currents for various collector emitter voltages. The one way is to draw its load line. We require the cut off and saturation points.

 We know, I_E=V_EE/R_E=30/10kΩ=3mA
I_C=α I_E =I_E =3mA
V_CB=V_CC-I_CR_L=25-15=10V. So, quiescent point is (10V, 3mA).

 We know, I_E=V_EE/R_E=15/5kΩ=3mA
I_C=α I_E =I_E =3mA
V_CB=V_CC-I_CR_L=20-15=5V. So, quiescent point is (5V, 3mA).

 We know, V_CE=12V
(I_C)_SAT =V_CC/R_L=12/6K=2mA. I_B=10V/0.5M=20µA. I_C= βI_B=1mA. I
V_CE=V_CC-I_CR_L=12-1*6=6V. So, quiescent point is (6V, 1mA).

We know, V_CE=6V
(I_C)_SAT =V_CC/R_L=10/2K=5mA. I_B=10V/0.5M=20µA. I_C= βI_B=1mA. I
V_CE=V_CC-I_CR_L=10-1*2=8V. So, quiescent point is (8V, 1mA).

In the common base circuit, the emitter diode acts like a forward biased ideal diode, while collector diode acts as a current source due to transistor action. Thus an ideal transistor may be regarded as a rectifier diode in the emitter and a current source at collector.

In the common emitter circuit, the ideal transistor may be regarded as a rectifier diode in the base circuit and a current source in the collector circuit. In the current source, the direction of arrow points in direction of conventional current.

The emitter junction is forward biased with the help of battery V_EE by which, negative of the battery is connected to the emitter while positive is connected to base. R_E is the emitter resistance. The collector junction is reversed biased.

When in a transistor is driven into saturation, we use V_CE(SAT) as another linear parameter. In, addition when a transistor is biased in saturation mode, we have I_C < βI_B. This characteristic used to prove that the transistor is indeed biased in saturation mode.

 We know, I_E=V_EE/R_E=10/5kΩ=2mA
I_C=α I_E =I_E =2mA
V_CB=V_CC-I_CR_L=20-10=10V. So, quiescent point is (10V, 2mA).