Test: Hardware Or Software Partitioning


10 Questions MCQ Test Embedded Systems (Web) | Test: Hardware Or Software Partitioning


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This mock test of Test: Hardware Or Software Partitioning for Computer Science Engineering (CSE) helps you for every Computer Science Engineering (CSE) entrance exam. This contains 10 Multiple Choice Questions for Computer Science Engineering (CSE) Test: Hardware Or Software Partitioning (mcq) to study with solutions a complete question bank. The solved questions answers in this Test: Hardware Or Software Partitioning quiz give you a good mix of easy questions and tough questions. Computer Science Engineering (CSE) students definitely take this Test: Hardware Or Software Partitioning exercise for a better result in the exam. You can find other Test: Hardware Or Software Partitioning extra questions, long questions & short questions for Computer Science Engineering (CSE) on EduRev as well by searching above.
QUESTION: 1

What do COOL stand for?

Solution:

Explanation: The COOL is the codesign tool which is one of the optimisation technique for partitioning the software and the hardware.

QUESTION: 2

 How many inputs part does COOL have?

Solution:

Explanation: The codesign tool consists of three input parts. These are target technology, design constraints and the behaviour and each input follows different functions. The target technology comprises the information about the different hardware platform components available within the system, design constraints are the second part of the input which contains the design constraints, and the behaviour part is the third input which describes the required overall behaviour.

QUESTION: 3

Which part of the COOL input comprises information about the available hardware platform components?

Solution:

Explanation: The codesign tool consists of three input parts which are described as target technology, design constraints and the behavior. Each input does different functions. The target technology comprises the information about the different hardware platform components available within the system.

QUESTION: 4

What does the second part of the COOL input comprise?

Solution:

Explanation: The second part of the COOL input comprises of the design constraints such as the latency, maximum memory size, required throughput or maximum area for application-specific hardware.

QUESTION: 5

 What do the third part of the COOL input comprise?

Solution:

Explanation: The codesign tool consists of three input parts and the third part of the COOL input describes the overall behaviour of the system. The hierarchical task graphs are used for this.

QUESTION: 6

How many edges does the COOL use?

Solution:

Explanation: The codesign tool has 2 edges. These are timing edges and the communication edges. The timing edge provides the timing constraints whereas the communication edge contains the information about the amount of information to be exchanged.

QUESTION: 7

Which edge provides the timing constraints?

Solution:

Explanation: The codesign tool has 2 edges. They are timing edges and the communication edges. The timing edge provides the timing constraints.

QUESTION: 8

 Which edge of the COOL contains information about the amount of information to be exchanged?

Solution:

Explanation: The codesign tool has 2 edges and these are timing edges and the communication edges. The communication edge contains the information about the amount of information to be exchanged.

QUESTION: 9

 What does Index set KH denotes?

Solution:

Explanation: There is certain index set which is used in the IP or the integer programming model. The KH denotes the hardware component types.

QUESTION: 10

 What do Index set L denotes?

Solution:

Explanation: The index set is used in the IP or the integer programming model. The Index set KP denotes the processor, I denote the task graph nodes and the L denotes the task graph node type.