Test: Interfacing Analog To Digital Data Converters - Computer Science Engineering (CSE) MCQ

Broadly speaking, the time taken by the converter to calculate the equivalent digital data output from the moment of the start of conversion is called conversion delay.

Successive approximation and dual slope integration are the most popular techniques that are used in the integrated ADC chips.

The general algorithm for interfacing ADC contains ensuring stability of analog input, issuing start of conversion pulse to ADC, reading end of conversion signal to mark the end of conversion process, reading digital data output of ADC as equivalent digital output.

 AD 7523 is a DAC(Digital to analog converter), 74373 is a latch, 74245 is transreceiver and ICL7109 is an ADC.

The conversion delay is 100microseconds which is low as compared to other converters.

 As these converters internally have 3:8 analog multiplexer, at a time 8 different analog inputs can be connected to the chip.

Compared to other 12-bit ADCs, it is of very low cost and useful for slow practical applications.

 Autozero phase, signal integrate phase and deintegrate phase are the three phases of total conversion cycle.

A feedback loop is closed around the system to charge the autozero capacitor to compensate for the offset voltages in the buffer amplifier, integrator and comparator.

The internal integrator needs 2048 clock cycles to integrate voltage difference between input low and input high.