Test: Interrupt And Stack Of 8051


10 Questions MCQ Test Microprocessors and Microcontrollers - Notes, Videos, MCQs | Test: Interrupt And Stack Of 8051


Description
This mock test of Test: Interrupt And Stack Of 8051 for Computer Science Engineering (CSE) helps you for every Computer Science Engineering (CSE) entrance exam. This contains 10 Multiple Choice Questions for Computer Science Engineering (CSE) Test: Interrupt And Stack Of 8051 (mcq) to study with solutions a complete question bank. The solved questions answers in this Test: Interrupt And Stack Of 8051 quiz give you a good mix of easy questions and tough questions. Computer Science Engineering (CSE) students definitely take this Test: Interrupt And Stack Of 8051 exercise for a better result in the exam. You can find other Test: Interrupt And Stack Of 8051 extra questions, long questions & short questions for Computer Science Engineering (CSE) on EduRev as well by searching above.
QUESTION: 1

 Which of the following is an external interrupt?

Solution:

INT0(active low) and INT1(active low) are two external interrupt inputs provided by 8051.

QUESTION: 2

The interrupts, INT0(active low) and INT1(active low) are processed internally by flags

Solution:

The interrupts, INT0(active low) and INT1(active low) are processed internally by the flags IE0 and IE1.

QUESTION: 3

The flags IE0 and IE1, are automatically cleared after the control is transferred to respective vector, if the interrupt is

Solution:

If the interrupts are programmed as edge sensitive, the flags IE0 and IE1 are automatically cleared after the control is transferred to respective vector.

QUESTION: 4

If the external interrupt sources control the flags IE0 and IE1, then the interrupt programmed is

Solution:

 If the interrupts are programmed as level sensitive, then the flags IE0 and IE1 are controlled by external interrupt sources themselves.

QUESTION: 5

The pulses at T0 or T1 pin are counted in

Solution:

In counter mode, the pulses are counted at T0 or T1 pin.

QUESTION: 6

The number of bytes stored on the stack during one operation of PUSH or POP is

Solution:

As 8051 stack operations are 8-bit wide i.e. in an operation using PUSH or POP instruction, one byte of data is stored on a stack or retrieved from the stack. For implementing 16-bit operations, two 8-bit operations are cascaded.

QUESTION: 7

The step involved in PUSH operation is

Solution:

The PUSH instruction follows two steps.
1. Increment stack by 1
2. Store 8-bit content of the 8-bit address specified in the instruction to the address pointed to by SP.

QUESTION: 8

 The step involved in POP operation is

Solution:

The POP instruction follows two steps.
1. Store the contents of top of stack pointed to by SP register to the 8-bit memory specified in the instruction.
2. Decrement stack by 1.

QUESTION: 9

The 8051 stack is

Solution:

The 8051 stack is opposite to that in 8085 or 8086 i.e. in 8085 it is auto-decrement while in 8051 it is auto-increment during PUSH operations.

QUESTION: 10

After reset, the stack pointer(SP) is initialised to the address of

Solution:

The stack pointer(SP) is an 8-bit register and is initialized to internal RAM address 07H after reset.

Similar Content

Related tests