Test: Memory Cells

Deterministic test pattern are used to detect specific faults or structural faults for a circuit under test.

Deterministic test pattern method is also known as stored test pattern method in the context of BIST applications.

Algorithmic test pattern method uses the hardware finite state machine for generating algorithmic test vectors for the circuit under test.

A n-bit counter produces totally 2^n number of all possible input combinations for testing the circuit under test and it is called as exhaustive test pattern method.

Exhaustive test pattern method detects all gate level struck-at fault and also bridging fault.

Exhaustive test pattern method does not detect all transistor level faults or delay faults since those faults needs specific ordering.

 Exhaustive test pattern method is not suitable for circuit having large N values since there is a limit for fault coverage.

 Exhaustive test pattern method needs fault simulation for determining fault coverage where as pseudo-exhaustive test pattern method does not need fault simulation.

Pseudo-random test pattern method have properties similar to random pattern sequence but the sequence are repeatable.

Random test pattern method is used for external functional testing of microprocessors as well as in ATPG software.