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Test: Microprocessor(8085)

25 Questions MCQ Test Basic Electronics Engineering for SSC JE (Technical) | Test: Microprocessor(8085)

Description

Attempt Test: Microprocessor(8085) | 25 questions in 50 minutes | Mock test for Electrical Engineering (EE) preparation | Free important questions MCQ to study Basic Electronics Engineering for SSC JE (Technical) for Electrical Engineering (EE) Exam | Download free PDF with solutions

QUESTION: 1

A microprocessor is ALU

A.
and control unit on a single chip.
B.
and memory on a single chip
C.
register unit and I/O device on a single chip.
D.
register unit and control unit on a single chip.

Solution:

QUESTION: 2

ALU (Arithmetic Logic Unit) of an 8085 microprocessor consists of :

A.
Accumulator, temporary register, arithmetic and logic circuits.
B.
Accumulator, arithmetic, logic circuits and five flags.
C.
Accumulator, arithmetic and logic circuits.
D.
Accumulator, temporary resister, arithmetic, logic circuits & five flags

Solution:

QUESTION: 3

Consider the following statements:

In 8085 microprocessor, data - bus and addressbus are multiplexed in order to

1. Increase the speed of microprocessor

2. Reduce the number of pins.

3. Connect more peripheral chips.

Which of the above statement is/are correct?

A.
1 only
B.
2 only
C.
2 and 3
D.
1, 2 and 3

Solution:

QUESTION: 4

In the circuit shown, the device connected to Y5 can have address in the range

A.
2000 – 20 FF
B.
2D00 – 2DFF.
C.
2E00 – 2EFF.
D.
FD00 – FDFF

Solution:

QUESTION: 5

The logic circuit used to generate the active low chip select (CS) by an 8085 microprocessor to address a peripheral is shown in figure. The peripheral will respond to addresses in the range.

A.
E000 – EFFF
B.
000E – FFFE
C.
1000 – FFFF
D.
0001 – FFF1

Solution:

QUESTION: 6

The logic circuit used to generate the active low chip select signal ( CS ) by an Intel 8085microprocessor to address a peripheral is shown in the figure. The peripheral will respond to address in the range.

A.
7800 H – 7 FFF H
B.
1000 H – 1 EFF H
C.
8000 H – 8 FFF H
D.
8800 H – 8 FFF H

Solution:

QUESTION: 7

Each cell of a static Random Access Memory contains

A.
6 MOS transistors
B.
2 MOS transistor and 2 capacitors
C.
2 MOS transistors and 4 capacitors
D.
1 MOS transistor and 1 capacitor

Solution:

QUESTION: 8

The minimum number of MOS transistor required to make a dynamic RAM cell is

A.
1
B.
2
C.
3
D.
4

Solution:

QUESTION: 9

A flash ROM is similar to

A.
SRAM
B.
DRAM
C.
PROM
D.
EPROM

Solution:

QUESTION: 10

Which one of the following statement is correct?

A.
ROM is a Read/Write memory
B.
PC points to the last instruction that was executed.
C.
Stack works on the principal of LIFO
D.
All instructions affect the flags

Solution:

QUESTION: 11

Which one of the following statements is correct?

A.
RAM is a non-volatile memory whereas ROM is a volatile memory.
B.
RAM is a volatile memory whereas ROM is a non - volatile memory
C.
Both RAM and ROM are non - volatile memories but in RAM data is lost when power is switched off.
D.
none

Solution:

QUESTION: 12

Which one of the following statement is correct?

A.
PROM contains a programmable 'AND' array and a fixed 'OR' array
B.
PLA contains a fixed 'AND' array and a programmable 'OR' array
C.
PROM contains a fixed 'AND' array and a programmable 'OR' array,
D.
PLA contains a programmable 'AND' array and a programmable 'NOR' array

Solution:

QUESTION: 13

A PLA can be used

A.
as a microprocessor
B.
as a dynamic memory
C.
to realise a sequential logic
D.
to realise a combinational logic

Solution:

QUESTION: 14

In PLA

A.
AND array alone is programmable
B.
OR array alone is programmable.
C.
both AND and OR are programmable
D.
both AND and OR are not programmable

Solution:

QUESTION: 15

The difference between PLA and ROM is

A.
PLA is sequential, ROM is combinational
B.
PLA is combinational, ROM is sequential
C.
PLA economizes on the number of minterms to implement Boolean functions.
D.
PLA has fixed AND array, ROM has fixed OR array.

Solution:

QUESTION: 16

A dynamic RAM consists of

A.
6 transistors
B.
2 transistors and 2 capacitors
C.
2 capacitors only
D.
1 transistors and 1 capacitors

Solution:

QUESTION: 17

A memory system has a total of 8 memory chips each with 12 address lines and 4 data lines. The size of the memory system is

A.
16 k bytes
B.
32 k bytes
C.
48 k bytes
D.
64 k bytes

Solution:

QUESTION: 18

Three memory chips are of size 1 KB, 2 KB and 4 KB. Their address bus is 10 bits, What are the data bus sizes of the chips ?

A.
8 bits, 16 bits and 24 bits respectively.
B.
8 bits, 16 bits and 32 bits respectively.
C.
8 bits, 16 bits and 64 bits respectively.
D.
8 bits, 16 bits and 128n bits respectively

Solution:

QUESTION: 19

What are the number of memories required of size 16×4 to design a memory of size 64×8 ?

A.
2
B.
4
C.
6
D.
8

Solution:

QUESTION: 20

Memory chips of four different sizes as below are available

1. 32 K × 4
2. 32 K × 16
3. 8 K × 8
4. 16 K × 4

All the memory chips as mentioned in the above list are Read/Write memory. What minimal combination of chips or chip alone can map full address space of 8085 microprocessor ?

A.
1 and 2
B.
1 Only
C.
2 Only
D.
4 Only

Solution:

QUESTION: 21

A 16 bit memory address resister can address memory locations of

A.
16 k
B.
32 k
C.
64 k
D.
128 k

Solution:

QUESTION: 22

The principle of locality of reference justifies the use of

A.
interrupts
B.
DMA
C.
virtual memory
D.
cache memory

Solution:

QUESTION: 23

Which block replacement algorithm is not generally used in cache operation?

A.
LIFO
B.
FIFO
C.
LRU
D.
Random

Solution:

QUESTION: 24

Which one of the following addressing technique is not used in 8085 microprocessor ?

A.
Register
B.
Immediate
C.
Register indirect
D.
Relative

Solution:

QUESTION: 25

Which of the following register of 8085 microprocessor is not a part of programming model ?

A.
Instruction register
B.
Memory address resister
C.
Status register
D.
Temporary data register

Solution:

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Test: Microprocessor(8085)