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ALU (Arithmetic Logic Unit) of an 8085 microprocessor consists of :
Consider the following statements:
In 8085 microprocessor, data - bus and addressbus are multiplexed in order to
1. Increase the speed of microprocessor
2. Reduce the number of pins.
3. Connect more peripheral chips.
Which of the above statement is/are correct?
In the circuit shown, the device connected to Y5 can have address in the range
The logic circuit used to generate the active low chip select (CS) by an 8085 microprocessor to address a peripheral is shown in figure. The peripheral will respond to addresses in the range.
The logic circuit used to generate the active low chip select signal ( CS ) by an Intel 8085microprocessor to address a peripheral is shown in the figure. The peripheral will respond to address in the range.
The minimum number of MOS transistor required to make a dynamic RAM cell is
A memory system has a total of 8 memory chips each with 12 address lines and 4 data lines. The size of the memory system is
Three memory chips are of size 1 KB, 2 KB and 4 KB. Their address bus is 10 bits, What are the data bus sizes of the chips ?
What are the number of memories required of size 16×4 to design a memory of size 64×8 ?
Memory chips of four different sizes as below are available
1. 32 K × 4
2. 32 K × 16
3. 8 K × 8
4. 16 K × 4
All the memory chips as mentioned in the above list are Read/Write memory. What minimal combination of chips or chip alone can map full address space of 8085 microprocessor ?
A 16 bit memory address resister can address memory locations of
The principle of locality of reference justifies the use of
Which block replacement algorithm is not generally used in cache operation?
Which one of the following addressing technique is not used in 8085 microprocessor ?
Which of the following register of 8085 microprocessor is not a part of programming model ?