Computer Science Engineering (CSE) Exam > Computer Science Engineering (CSE) Tests > Computer Architecture & Organisation (CAO) > Test: Multiple BUS Organisation - Computer Science Engineering (CSE) MCQ
Test: Multiple BUS Organisation - Computer Science Engineering (CSE) MCQ
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10 Questions MCQ Test Computer Architecture & Organisation (CAO) - Test: Multiple BUS Organisation
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Test: Multiple BUS Organisation - Question 1
The general purpose registers are combined into a block called as ______
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Test: Multiple BUS Organisation - Question 2
In ______ technology, the implementation of the register file is by using an array of memory locations.
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Test: Multiple BUS Organisation - Question 3
In a three BUS architecture, how many input and output ports are there ?
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Test: Multiple BUS Organisation - Question 4
For a 3 BUS architecture, is the below code correct for adding three numbers ?
PCout, R = B, MARin , READ, Inc PC
WMFC
MDRout, R = B, IRin
R4outa, R5outb, Select A, ADD, R6in, End
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Test: Multiple BUS Organisation - Question 5
The main advantage of multiple bus organisation over single bus is __________
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Test: Multiple BUS Organisation - Question 7
If the instruction Add R1,R2,R3 is executed in a system which is pipelined, then the value of S is (Where S is term of the Basic performance equation).
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Test: Multiple BUS Organisation - Question 8
In multiple BUS organisation __________ is used to select any of the BUSes for input into ALU.
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Test: Multiple BUS Organisation - Question 9
There exists a seperate block consisting of various units to decode an instruction.
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Test: Multiple BUS Organisation - Question 10
There exists a seperate block to increment the PC in multiple BUS organisation.
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