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Test: Prediction of Execution Times - Computer Science Engineering (CSE) MCQ


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9 Questions MCQ Test Embedded Systems (Web) - Test: Prediction of Execution Times

Test: Prediction of Execution Times for Computer Science Engineering (CSE) 2024 is part of Embedded Systems (Web) preparation. The Test: Prediction of Execution Times questions and answers have been prepared according to the Computer Science Engineering (CSE) exam syllabus.The Test: Prediction of Execution Times MCQs are made for Computer Science Engineering (CSE) 2024 Exam. Find important definitions, questions, notes, meanings, examples, exercises, MCQs and online tests for Test: Prediction of Execution Times below.
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Test: Prediction of Execution Times - Question 1

 Identify the standard software components that can be reused?

Detailed Solution for Test: Prediction of Execution Times - Question 1

Explanation: There are certain software components that can be reused in an embedded system design. These are the operating systems, real-time databases and some other forms of middleware.

Test: Prediction of Execution Times - Question 2

What does WCTE stand for?

Detailed Solution for Test: Prediction of Execution Times - Question 2

Explanation: The WCTE is the worst case execution time which is an upper bound on the execution times of task. It can be computed for certain programs like while loops, programs without recursion, iteration count etc.

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Test: Prediction of Execution Times - Question 3

For which of the following WCET can be computed?

Detailed Solution for Test: Prediction of Execution Times - Question 3

Explanation: The WCET computing is a difficult task for assembly language and for computing WCTE for any high-level language without the knowledge of the generated assembly code is impossible.

Test: Prediction of Execution Times - Question 4

 Which estimate approach is more precise?

Detailed Solution for Test: Prediction of Execution Times - Question 4

Explanation: The accurate cost and performance value is possible if interfaces to software synthesis tools and hardware synthesis tools exist and is more precise than the any other methods.

Test: Prediction of Execution Times - Question 5

Which estimate approach take more time to consume?

Detailed Solution for Test: Prediction of Execution Times - Question 5

Explanation: The accurate cost and the performance value method is time-consuming but the other estimating approaches are less time consuming.

Test: Prediction of Execution Times - Question 6

Which estimation technique can be used if interfaces to software synthesis tools and hardware synthesis tools exist?

Detailed Solution for Test: Prediction of Execution Times - Question 6

Explanation: The accurate cost and performance value is possible if interfaces to software synthesis tools and hardware synthesis tools exist.

Test: Prediction of Execution Times - Question 7

Which of the following is the base for scheduling algorithm?

Detailed Solution for Test: Prediction of Execution Times - Question 7

Explanation: The base for scheduling algorithm is the WCET, worst case execution time which is a bound on the execution time of tasks. Such a computing is undecidable in the general case, so it is decidable for certain programs only such as programs without recursion, iteration count, while loops etc.

Test: Prediction of Execution Times - Question 8

Which estimation approach is used by Jha and Dutt for hardware?

Detailed Solution for Test: Prediction of Execution Times - Question 8

Explanation: There are different estimation techniques used. One such is the estimated cost and performance value which is proposed by Jha and Dutt for hardware. The accurate cost and performance value is proposed by Jain et al for software.

Test: Prediction of Execution Times - Question 9

 The WCET of which component can be computed if the task is mapped to hardware?

Detailed Solution for Test: Prediction of Execution Times - Question 9

Explanation: The worst case execution time of the hardware can be computed if the task is mapped to the hardware which in turn requires the synthesis of the hardware.

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