Test: Memory Protection Unit


10 Questions MCQ Test Embedded Systems (Web) | Test: Memory Protection Unit


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This mock test of Test: Memory Protection Unit for Computer Science Engineering (CSE) helps you for every Computer Science Engineering (CSE) entrance exam. This contains 10 Multiple Choice Questions for Computer Science Engineering (CSE) Test: Memory Protection Unit (mcq) to study with solutions a complete question bank. The solved questions answers in this Test: Memory Protection Unit quiz give you a good mix of easy questions and tough questions. Computer Science Engineering (CSE) students definitely take this Test: Memory Protection Unit exercise for a better result in the exam. You can find other Test: Memory Protection Unit extra questions, long questions & short questions for Computer Science Engineering (CSE) on EduRev as well by searching above.
QUESTION: 1

How many regions are created by the memory range in the ARM architecture?

Solution:

Explanation: The memory protection unit in the ARM architecture divides the memory into eight separate regions. Each region can be small as well as big ranging from 4 Kbytes to 4 Gbytes.

QUESTION: 2

How many bit does the memory region in the ARM memory protection unit have?

Solution:

Explanation: The memory region possesses three bits which are the cacheable bit, bufferable bit and access permission bit.

QUESTION: 3

 Which of the following uses a priority level for permitting data?

Solution:

Explanation: In the ARM protection architecture, the memory is divided into some regions of size 4 Kbytes to 4 Gbytes. These regions possess bits called the cacheable bit, buffer bit, and access permitted bits. The regions are numbered as per priority level for which the permission bits takes the precedence if any of the regions gets overlapped.

QUESTION: 4

What type of bit in the ARM memory mimics to that of the protection unit of ARM management unit?

Solution:

Explanation: The ARM architecture memory protection unit divides the memory range into different regions of size ranging from 4 Kbytes to 4 Gbytes. Each region is associated with certain bits called the cacheable bit, buffer bit, and access permitted bit. These bits are similar to the permission bit in the ARM memory management unit architecture which are stored in the control register.

QUESTION: 5

Which of the following bits are used to control the cache behaviour?

Solution:

Explanation: The cacheable bit and the buffer bit are used to control the behaviour of cache. Depending on the cacheable bit and the buffer bit, the memory access will complete successfully.

QUESTION: 6

Which of the following unit provides security to the processor?

Solution:

Explanation: The memory management unit and the memory protection unit provides security to the processor by trapping the invalid memory accesses before they corrupt other data.

QUESTION: 7

Which of the following includes a tripped down memory management unit?

Solution:

Explanation: The memory protection unit allows a tripped memory down memory management unit in which the memories are partitioned and protected without any address translation. This can remove the time consumption in the address translation thereby increases the speed.

QUESTION: 8

 Which of the following can reduce the chip size?

Solution:

Explanation: The memory protection unit have many advantages over the other units. It can reduce the chip size, cost and power consumption.

QUESTION: 9

 How does the memory management unit provide the protection?

Solution:

Explanation: The memory management unit can be used as a protection unit by disabling the address translation that is, the physical address and the logical address are the same.

QUESTION: 10

Which of the following is used to start a supervisor level?

Solution:

Explanation: If a memory access from the software does not access the correct data, an error signal is generated which will start a supervisor level software for the decision.

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