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# Test: Design Rules And Layout

## 25 Questions MCQ Test VLSI System Design | Test: Design Rules And Layout

Description
This mock test of Test: Design Rules And Layout for Electrical Engineering (EE) helps you for every Electrical Engineering (EE) entrance exam. This contains 25 Multiple Choice Questions for Electrical Engineering (EE) Test: Design Rules And Layout (mcq) to study with solutions a complete question bank. The solved questions answers in this Test: Design Rules And Layout quiz give you a good mix of easy questions and tough questions. Electrical Engineering (EE) students definitely take this Test: Design Rules And Layout exercise for a better result in the exam. You can find other Test: Design Rules And Layout extra questions, long questions & short questions for Electrical Engineering (EE) on EduRev as well by searching above.
QUESTION: 1

### Circuit design concepts can also be represented using symbolic diagram.

Solution:

Circuit design concepts can be represented using stick diagrams and symbolic diagrams. Stick diagrams represents different layers with color codes. Symbolic diagram represents the structure with symbols with color codes.

QUESTION: 2

### Circuit designers need _______ circuits

Solution:

Circuit designers in general prefer tighter, smaller layouts for improved performance and decreased silicon area.

QUESTION: 3

### Process engineers want ______ process

Solution:

Process engineers wants design rules which are controllable and reproducible process.

QUESTION: 4

Maturity level of the process line affects design rules.

Solution:

Yes, the maturity level of the process line affects design rules.

QUESTION: 5

Design rules does not specify

Solution:

Design rules specify line widths, separations and extensions in terms of lambda.

QUESTION: 6

The width of n-diffusion and p-diffusion layer should be

Solution:

The width of n-diffusion and p-diffusion should be 2λ according to design rules.

QUESTION: 7

What should be the spacing between two diffusion layers?

Solution:

The spacing between two diffusion layers should be 3λ according to design rules and standards.

QUESTION: 8

What should be the width of metal 1 and metal 2 layers?

Solution:

The width of the metal 1 layer should be 3λ and metal 2 should be 4λ.

QUESTION: 9

Implant should extend _______ from all the channels

Solution:

Implant for a n-mos depletion mode transistor should extend minimum of 2λ from the channel in all the directions.

QUESTION: 10

Which type of contact cuts are better?

Solution:

Buried contacts are much better than butted contacts. In butted contacts the two layers are joined together or binded together using adhesive type of material where as in buried contact one layer is interconcted or fitted into another.

QUESTION: 11

Which design method occupies or uses lesser area?

Solution:

Micron rules occupies or consumes lesser area. 50% of the area usage can be reduced by using micron rules over lambda rules.

QUESTION: 12

Which gives scalable design rules?

Solution:

Lambda rules gives scalable design rules and micron rules gives absolute dimensions.

QUESTION: 13

Devices designed with lambda design rules are prone to shorts and opens.

Solution:

Lambda design rules prevents shorting, opens, contact from slipping out of area to be contacted.

QUESTION: 14

Diffusion and polysilicon layers are connected together using

Solution:

Diffusion and polysilicon layer are joined together using butting contact. In butting contact the two layers are joined or binded together.

QUESTION: 15

Which is more complex process?

Solution:

Butting contact is complex process whereas buried contact is simple process because butting contact should be done more carefully to serve well and be strong.

QUESTION: 16

Which contact cut occupies smaller area?

Solution:

Buried contact occupies smaller area than butting contact as in buried contacts one layer will be completely within or almost within the another layer.

QUESTION: 17

Isolation layer between two metal layers must be thinner.

Solution:

Isolation layer between two metal layers should be thicker. Metal to metal separation is large and is brought about mainly by difficulties in defining metal edges accurately.

QUESTION: 18

The oxide layer below the first metal layer is deposited using

Solution:

The oxide layer below the first metal layer is depostied using chemical vapour deposition method. This is a chemical process used to produce high quality high performance solid materials.

QUESTION: 19

Which layer is used for power and signal lines?

Solution:

Metal layers are used for power and signal lines as metals has good thermal and electrical conductivity.

QUESTION: 20

Minimum feature size for thick oxide is

Solution:

The minimum feature size for thick oxide is 3λ and minimum separation between thinox regions is also 3λ.

QUESTION: 21

Hatching is compatible with

Solution:

Hatching is compatible with monochrome encoding and also may be added to color mask coding. It is designed using closely spaced lines or sticks.

QUESTION: 22

Minimum n-well width should be ____ micro meter

Solution:

The minimum width of n-well is 3 micro meter because n-well should be with little thickness and in it p-type devices are formed.

QUESTION: 23

The minimum spacing between two n-well is _____ micro meter

Solution:

The minimum spacing between two n-well is 8.5 micro meter according to the lambda based design rules.

QUESTION: 24

Which can bring about variations in threshold voltage?

Solution:

One of the problem in the manufacture using design rule is that variation in threshold voltage occurs. And this is caused by oxide thickness, ion implantation and poly variations.

QUESTION: 25