Test: Propagation Delays


10 Questions MCQ Test VLSI System Design | Test: Propagation Delays


Description
This mock test of Test: Propagation Delays for Electrical Engineering (EE) helps you for every Electrical Engineering (EE) entrance exam. This contains 10 Multiple Choice Questions for Electrical Engineering (EE) Test: Propagation Delays (mcq) to study with solutions a complete question bank. The solved questions answers in this Test: Propagation Delays quiz give you a good mix of easy questions and tough questions. Electrical Engineering (EE) students definitely take this Test: Propagation Delays exercise for a better result in the exam. You can find other Test: Propagation Delays extra questions, long questions & short questions for Electrical Engineering (EE) on EduRev as well by searching above.
QUESTION: 1

 Propogation time is directly proportional to

Solution:

Propogation time is directly proportional to square of the propogation distance (x2 ). It is the time taken by the signal to move from input port to output port.

QUESTION: 2

The total resistance can be given as

Solution:

The total resistance can be given as the product of nrRs where r is the relative resistance per section in terms of Rs.

QUESTION: 3

 Total capacitance can be given as

Solution:

Total capacitance can be given as the product of nc(square Cg) where c is the relative capacitance per section in terms of square Cg.

QUESTION: 4

Overall delay is directly proportional to

Solution:

The overall delay is directly proportional to n2 , where n is the number of pass transistors in series.

QUESTION: 5

The number of pass transistors connected in series can be increased if

Solution:

The number of pass transistors connected in series can be increased by connecting buffer in between.

QUESTION: 6

Buffer is used because

Solution:

Buffer is used for long polysilicon runs because it increses the speed and reduces the sensitivity to noise.

QUESTION: 7

The overall delay is ______ to the relative resistance r

Solution:

 The overall delay is directly proportional to the relative resistance r. Overall delay is given as product of n^2rcƮ.

QUESTION: 8

 Small disturbances of noise

Solution:

Small disturbanes of noise switches the inverter stage between 0 and 1 or vice versa. It disturbs the normal operation or behaviour.

QUESTION: 9

The buffer speeds up the

Solution:

The buffer speeds up the rise time of propogated signal edge. A buffer is the combination of two inverters in which one output is fed to the other as the input.

QUESTION: 10

Overall delay increases as n

Solution:

Overall delay increases as n increases where n is the number of pass transistors connected in series.