Machine Instructions And Addressing Modes - MCQ Quiz - 1


20 Questions MCQ Test RRB JE for Computer Science Engineering | Machine Instructions And Addressing Modes - MCQ Quiz - 1


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QUESTION: 1

The most relevant addressing mode to write position-independent codes is:

Solution:

C) Relative Mode since we can just change the content of base register if we wish to relocate.

*Multiple options can be correct
QUESTION: 2

Match the pairs in the following questions:
(A) Base addressing               (p) Reentranecy
(B) Indexed addressing          (q) Accumulator
(C) Stack addressing              (r) Array
(D) Implied addressing           (s) Position independent

Solution:

(A) Base addressing - Position independent (By changing value in Base register location of address can be changed)

(B) Indexed addressing - Array

(C) Stack addressing - Reentranecy (Whenever code happens to be used again, address need not be the same)

(D) Implied addressing - Accumulator (If an address is not specified, it is assumed/implied to be the Accumulator)

QUESTION: 3

When we use auto increment or auto decrements, which of the following is/are true?
1) In both, the address is used to retrieve the operand and then the address gets altered
2) In auto increment the operand is retrieved first and then the address altered
3) Both of them can be used on general purpose registers as well as memory locations

Solution:
QUESTION: 4

Relative mode of addressing is most relevant to writing

Solution:

Answer: B
Relative mode addressing is most relevant to writing a position-independent code.

QUESTION: 5

Which of the following addressing modes permits relocation without any change whatsoever in the code?

Solution:

PC relative addressing is the best option. For Base register addressing, we have to change the address in the base register while in PC relative there is absolutely no change in code needed.

QUESTION: 6

A certain processor supports only the immediate and the direct addressing modes. Which of the following programminglanguage features cannot be implemented on this processor?

Solution:

Pointer access requires indirect addressing which can be simulated with indexed addressing or register indirect addressing but not with direct and immediate addressing. An array and record access needs a pointer access. So, options A, B and C cannot be implemented on such a processor.
Now, to handle recursive procedures we need to use stack. A local variable inside the stack will be accessed as *
(SP+offset) which is nothing but a pointer access and requires indirect addressing. Usually this is done by moving the SP value to Base register and then using Base Relative addressing to avoid unnecessary memory accesses for indirect
addressing- but not possible with just direct and immediate addressing.
So, options A, B, C and D are correct.

QUESTION: 7

The most appropriate matching for the following pairs
X: Indirect addressing 1: Loops
Y: Immediate addressing 2: Pointers
Z: Auto decrement addressing 3: Constantsis

Solution:

C is the most appropriate one

QUESTION: 8

Which is the most appropriate match for the items in the first column with the items in the second column
X. Indirect Addressing                       I. Array implementation
Y. Indexed addressing                      II. Writing relocatable code
Z. Base Register  Addressing          III. Passing array as parameter 

Solution:

(A) is the answer.
Array implementation can use Indexed addressing
While passing array as parameter we can make use of a pointer (as in C) and hence can use Indirect addressing
Base Register addressing can be used to write relocatable code by changing the content of Base Register.

QUESTION: 9

In the absolute addressing mode

Solution:

(b) is the answer. Absolute addressing mode means address of operand is given in the instruction.
(a) operand is inside the instruction -> immediate addressing
(c) register containing the address in specified in operand-> register Indirect addressing
(d) the location of operand is implicit-> implicit addressing

QUESTION: 10

Which of the following addressing modes are suitable for program relocation at run time?
I. Absolute addressing
II. Based addressing
III. Relative addressing
IV. Indirect addressing

Solution:

Answer: C
A displacement type addressing should be preferred. So, I is not the answer.
Indirect Addressing leads to extra memory reference which is not preferable at run time. So, IV is not the answer.

QUESTION: 11

Consider a three word machine instruction

ADD A[R0], @B

The first operand (destination) “A[R0]” uses indexed addressing mode with R0 as the index register. The second operand(source) “@B” uses indirect addressing mode. A and B are memory addresses residing at the second and third words,respectively. The first word of the instruction specifies the opcode, the index register designation and the source anddestination addressing modes. During execution of ADD instruction, the two operands are added and stored in thedestination (first operand).

The number of memory cycles needed during the execution cycle of the instruction is:

Solution:

1 memory read - get first operand from memory address A+R0 (A is given as part of instruction)
1 memory read - get address of second operand (since second uses indirect addressing)
1 memory read - to get second operand from the address given by the previous memory read
1 memory write - to store to first operand (which is the destination)
So, totally 4 memory cycles once the instruction is fetched.

QUESTION: 12

Match each of the high level language statements given on the left hand side with the most natural addressing mode from those listed on the right hand side.
(1) A[I] = B[J] (a) Indirect addressing
(2) while (*A++); (b) Indexed addressing
(3) int temp = *x (c) Auto increment

Solution:

(c) is the answer.
A[i] = B[j]; Indexed addressing
while(*A++); Auto increment
temp = *x; Indirect addressing

*Multiple options can be correct
QUESTION: 13

Which of the following statements about relative addressing mode is FALSE?
A. It enables reduced instruction size
B. It allows indexing of array element with same instruction
C. It enables easy relocation of data
D. It enables faster address calculation than absolute addressing

Solution:
QUESTION: 14

The memory locations 1000, 1001 and 1020 have data values 18, 1 and 16 respectively before the following program is
executed.
MOVI               Rs, 1                ; Move immediate
LOAD               Rd, 1000 (Rs)  ; Load from memory
ADDI                Rd, 1000          ; Add immediate
STOREI           0 (Rd), 20         ; Store immediate
Which of the statements below is TRUE after the program is executed ?

Solution:

D) Memory location 1001 has value 20.
Rs  1 (Immediate Addressing)

Rd  1 (Indexed Addressing, value at memory location 1+1000 = 1001 is loaded to Rwhich is 1)
( Rbecomes 1+1000)
store in address  1001   20

QUESTION: 15

Which of the following is/are true of the auto-increment addressing mode?
I. It is useful in creating self-relocating code
II. If it is included in an Instruction Set Architecture, then an additional ALU is required for effective address calculation
III. The amount of increment depends on the size of the data item accessed

Solution:

In auto increment addressing mode, the base address is incremented after operand fetch. This is useful in fetching elements from an array. But this has no effect in self-relocating code (where code can be loaded to any address) as this
works on the basis of an initial base address.
An additional ALU is desirable for better execution especially with pipelining, but never a necessity.
Amount of increment depends on the size of the data item accessed as there is no need to fetch a part of a data.
So, answer must be C only.

QUESTION: 16

Consider a hypothetical processor with an instruction of type, which during execution reads a 32-bit word from memory and stores it in a 32-bit register. The effective address of the memory location is obtained by the addition of a constant 20 and the contents of register. Which of the following best reflects the addressing mode implemented by this instruction for the operand in memory?

Solution:

Answer: D
Base Index Addressing, as the content of register R2 will serve as the index and 20 will be the Base address.

QUESTION: 17

Consider the C struct defined below:
struct data {
int marks [100];
char grade;
int cnumber;
};
struct data student;
The base address of student is available in register R1. The field student.grade can be accessed efficiently using

Solution:

Option (D)

Displacement Mode :-
Similar to index mode, except instead of a index register a base register will be used. Base register contains a pointer to a memory location. An integer (constant) is also referred to as a displacement. The address of the operand is obtained by
adding the contents of the base register plus the constant. The difference between index mode and displacement mode is in the number of bits used to represent the constant. When the constant is represented a number of bits to access the
memory, then we have index mode. Index mode is more appropriate for array accessing; displacement mode is more appropriate for structure (records) accessing.

QUESTION: 18

For the daisy chain scheme of connecting I/O devices, which of the following statements is true?

Solution:

daisy chaining approach tell the processor i which order the interrupt should be handled by providing priority to the devices
In daisy chaining method all the devices are connected in serial. The device with the highest priority is placed in the first position, followed by lower priority devices . interrupt pin is common to all
so answer is a

QUESTION: 19

A hard disk is connected to a 50 MHz processor through a DMA controller. Assume that the initial set-up of a DMA transfer takes 1000 clock cycles for the processor, and assume that the handling of the interrupt at DMA completion requires 500 clock cycles for the processor. The hard disk has a transfer rate of 2000 Kbytes/sec and average block transferred is 4 K
bytes. What fraction of the processor time is consumed by the disk, if the disk is actively transferring 100% of the time?


Solution:
QUESTION: 20

The correct matching for the following pairs is:
(A) DMA I/O (1) High speed RAM
(B) Cache (2) Disk
(C) Interrupt I/O (3) Printer
(D) Condition Code Register (4) ALU

Solution:

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