Secondary Memory And DMA (Basic Level)- 1


7 Questions MCQ Test Question Bank for GATE Computer Science Engineering | Secondary Memory And DMA (Basic Level)- 1


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QUESTION: 1

 During DMA transfer, DMA controller takes over the buses to manage the transfer

Solution:

During DMA transfer, DMA controller takes over the busses to manage the transfer directly from I/O devices to memory or vice-versa.

QUESTION: 2

Which of the following data transfer mode takes relatively more time?

Solution:

Programmed I/O data transfer mode takes relatively more time than DMA and interrupt initiated I/O.

QUESTION: 3

 The CPU initializes the DMA by sending ______ .

Solution:

The CPU initializes the DMA by sending:
The starting address of the memory blocks where data are available (for read) or where data are to be stored. (For write)
The word count, which is the number of words in the memory.
Control to specify the mode of transfer such as read or write.

QUESTION: 4

Assembler directives represents_______ .
1. Machine instruction to be included in the object program.
2. The allocation of storage for constants or program variable.

Solution:

Assembler directives neither represents machine instructions to be included in the object program nor indicate the allocation of storage for constants or program variables.
Instead, these statements direct the assembler to take certain actions during the process of assembling a program. They are used to indicate certain things regarding how assembly of the input program is to be performed.

QUESTION: 5

Daisy Chained and Independent Request bus arbitration requires______respectively. (Where N stands for number of Bus Master Devices in the Configuration)

Solution:

Daisy chained arbitration scheme requires 3 lines irrespective of the number of devices, A pair of REQ/GRANT lines are required in the case of independent request type arbitration and so for N devices 2N lines

QUESTION: 6

Select the correct option for communication between computer buses with memory and I/O.

Solution:

For communication between can:
1. Contain one common bus for memory and I/O with common control lines.
2. Contain two separate buses, one for memory and other for I/O.
3. Contain one common bus for memory and I/O but have separate control line for each.

QUESTION: 7

A processor that communicates with remote terminals over telephone and other communication media in a serial fashion is called _______ .

Solution:

Data communication processor is the processor that communicate with remote terminals over telephone and other communication media in a serial fashion.

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