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BDL MT Electronics Mock Test - 1 - Electronics and Communication Engineering (ECE) MCQ


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30 Questions MCQ Test BDL MT Electronics Mock Test Series 2026 - BDL MT Electronics Mock Test - 1

BDL MT Electronics Mock Test - 1 for Electronics and Communication Engineering (ECE) 2026 is part of BDL MT Electronics Mock Test Series 2026 preparation. The BDL MT Electronics Mock Test - 1 questions and answers have been prepared according to the Electronics and Communication Engineering (ECE) exam syllabus.The BDL MT Electronics Mock Test - 1 MCQs are made for Electronics and Communication Engineering (ECE) 2026 Exam. Find important definitions, questions, notes, meanings, examples, exercises, MCQs and online tests for BDL MT Electronics Mock Test - 1 below.
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BDL MT Electronics Mock Test - 1 - Question 1

A RL high-pass filter can be represented by the circuit where R is the internal resistance of the inductor

The frequency at which is _____Hz

Detailed Solution for BDL MT Electronics Mock Test - 1 - Question 1

From the voltage division rule

BDL MT Electronics Mock Test - 1 - Question 2

The doping material for an N-type semiconductor is

Detailed Solution for BDL MT Electronics Mock Test - 1 - Question 2

Semiconductor:

A semiconductor is a substance that has a resistivity in between conductor and insulator.
A semiconductor has 4 valance electrons that are C, Si, Ge, Sn, and Pb.

Classification of Semiconductor:

Intrinsic Semiconductor:

An extremely pure form is known as an Intrinsic Semiconductor.
In intrinsic Semiconductors, even at room temperature, hole electrons pair are created.
Electric fields applied across the intrinsic semiconductor cause current conduction due to both Holes as well as Electrons.

Extrinsic Semiconductor:

The process of adding impurity to the pure semiconductor is called Doping.
By means of doping Extrinsic semiconductor is formed.
Normally, 108 atoms of semiconductor added with 1 atom of impurity.
Depending upon the types of impurity added, the extrinsic semiconductor is classified into N-type and P-Type semiconductors.

1. N-Type Semiconductor:
This type of semiconductor is formed by added pentavalent impurity.

The current conduction in N-Type semiconductor is predominantly by free electron or it has electron type conductivity.
2. P-Type Semiconductor:
This type of semiconductor is formed by added Trivalent impurity.

The current conduction in the P-Type semiconductor is predominantly by holes or it has hole type conductivity.
Conclusion:
Hence, Pentavalent impurity in Intrinsic semiconductors is used to create an N-type semiconductor.

BDL MT Electronics Mock Test - 1 - Question 3

A device whose characteristics are very close to that of an ideal voltage source is a

Detailed Solution for BDL MT Electronics Mock Test - 1 - Question 3

The device used for the voltage regulator and also gives characteristics that are very close to that of an ideal voltage source is a Zener diode.
It is used to regulate the voltage level. It generates a fixed output voltage that remains constant for any changes in load conditions or input voltage.
Zener diode:


It is a PN junction (silicon PN junction) diode and has a low specified reverse voltage which takes advantage of any reverse voltage applied to it.
From the I-V characteristics curve above, the voltage across the diode in the breakdown is almost constant.
In the breakdown region, it is used in voltage regulator applications.
BDL MT Electronics Mock Test - 1 - Question 4

______ is the maximum reverse voltage that can be applied to the pn junction ______ to the junction.

Detailed Solution for BDL MT Electronics Mock Test - 1 - Question 4

Peak inverse voltage:
The peak inverse voltage rating of a diode may be defined as the maximum value of the reverse voltage that a PN-junction (or diode) can withstand without damaging (or destruction).
When the voltage applied to a diode is more than PIV, it is likely to result in breakdown at the junction.Important PointsPIV for different rectifiers is shown below:

Half Wave rectifier: Vm
Full Wave centre tap rectifier: 2Vm
Full Wave Bridge rectifier: Vm
BDL MT Electronics Mock Test - 1 - Question 5

The common collector current gain (γ) of BJT is 10. Now if the common-base current gain (α) charges 0.5% from its nominal value, then the percentage change in the common-emitter current gain (β) will be

Detailed Solution for BDL MT Electronics Mock Test - 1 - Question 5

Concept:-
Common Emitter current gain (β) = IC/IB 
Common Base current gain (α) = IC/IE 
Common Collector current gain (γ) = IE/IB 
IC = Collector current
IB = Base current
IE = Emitter current
Formula:-

Calculation:-
We have, γ = 10

we know,


= 10 × 0.5
= 5%

BDL MT Electronics Mock Test - 1 - Question 6

Find the node voltage at node 1 in the following circuit.

Detailed Solution for BDL MT Electronics Mock Test - 1 - Question 6

Applying nodal analysis at node 1,

Applying nodal analysis at node 2,

After solving (i) and (ii),

We get V1 = 33.7 V

V2 = 13.85 V

BDL MT Electronics Mock Test - 1 - Question 7

What values of Rth and Vth will cause the circuit of figure (B) to be the equivalent circuit of figure (A)?

Detailed Solution for BDL MT Electronics Mock Test - 1 - Question 7

Concept:
According to Thevenin’s theorem, any linear circuit across a load can be replaced by an equivalent circuit consisting of a voltage source Vth in service with a resistor Rth as shown:

Vth = Open circuit Voltage at a – b (by removing the load), i.e.

Application:
The circuit to evaluate the Thevenin voltage is drawn as:

Applying voltage division rule, we get:

Thevenin Resistance:
The circuit to evaluate the Thevenin resistance is drawn as:

Rth = 6 ∥ 4

Rth = 2.4 Ω

BDL MT Electronics Mock Test - 1 - Question 8

Check the system with characteristic equation F(s) = s4 + 3s3 + 2s2 + s + 1 for stability.

Detailed Solution for BDL MT Electronics Mock Test - 1 - Question 8

Routh-Hurwitz Stability Criterion:

It is used to test the stability of an LTI system.
According to the Routh tabulation method, the system is said to be stable if there are no sign changes in the first column of the Routh array.
The number of poles lies on the right half of s plane = number of sign changes

Application:
F(s) = s4 + 3s3 + 2s2 + s + 1
By applying Routh tabulation method, we get:

Since there are two sign changes in the first column of the Routh array, the system is unstable.

Important Point:

A row of zeros in a Routh table:
This situation occurs when the characteristic equation has

a pair of real roots with opposite sign (±a)
complex conjugate roots on the imaginary axis (± jω)
a pair of complex conjugate roots with opposite real parts (-a ± jb, a ± jb)
BDL MT Electronics Mock Test - 1 - Question 9

A linear time invariant system with input u(t) and output y(t) is described by the state space representation as given below.

The transfer function of the system is

Detailed Solution for BDL MT Electronics Mock Test - 1 - Question 9

From the given equations

Transfer function is,

BDL MT Electronics Mock Test - 1 - Question 10

The Fourier transform of a signal is as shown:

The signal in the time domain is:

Detailed Solution for BDL MT Electronics Mock Test - 1 - Question 10

Concept:
The inverse Fourier Transform of a signal is given by:

Calculation:

Given,

= A sin ω0t

BDL MT Electronics Mock Test - 1 - Question 11

Which of the following signals are continuous and can vary in wide range of values?

Detailed Solution for BDL MT Electronics Mock Test - 1 - Question 11

Analog Signal:

An analog signal is a signal that can take on any amplitude and is well-defined at every time.

Discrete Signal:

A discrete-time signal is a signal that can take on any amplitude but is defined only at a set of discrete times.

Digital Signals:

A digital signal is a signal whose amplitude can take on only a finite set of values, normally two (binary signal), and is defined only at a discrete set of times.

Domain Signal:

A time-domain graph shows how a signal changes over time, whereas a frequency-domain graph shows how much of the signal lies within each given frequency band over a range of frequencies.

BDL MT Electronics Mock Test - 1 - Question 12

The binary code of (21.125)10 is

Detailed Solution for BDL MT Electronics Mock Test - 1 - Question 12

Step 1: Divide (21)10 successively by 2 until the quotient is 0.
21/2 = 10, remainder is 1
10/2 = 5, remainder is 0
5/2 = 2, remainder is 1
2/2 = 1, remainder is 0
1/2 = 0, remainder is 1

Step 2: Read from bottom (MS2) to top (LS2) as 10101
This is the binary equivalent of decimal number 21

Step 3:Binary equivalent of 0.125 is, multiplying by 2 until we get 1 and writing down the integer after each multiplication,
⇒ 0.125 × 2 = 0.25
⇒ 0.25 × 2 = 0.5
⇒ 0.5 × 2 = 1
⇒ Binary equivalent of 0.125 = 001
The binary code of (21.125)10 is,
(21.125)10 = 10101.001

BDL MT Electronics Mock Test - 1 - Question 13

The circuit shown in the figure below works as a 2-bit analog to digital converter for 0 ≤ Vin ≤ 3 V.
The MSB of the output Y1, expressed as a Boolean function of the inputs X1, X2, X3 is given by

Detailed Solution for BDL MT Electronics Mock Test - 1 - Question 13

Given digital circuit is an encoder

The remaining inputs of X3 X2 X1 are don’t cares.
Taking the k-map for Y1

Y1 = X2

BDL MT Electronics Mock Test - 1 - Question 14

A state diagram of a logic gate which exhibits delay in the output is shown in the figure, where X is the don’t care condition and Q is the output representing the state

The logic gate represented by the state diagram is

Detailed Solution for BDL MT Electronics Mock Test - 1 - Question 14


From above truth table, state diagram → NAND Gate.

BDL MT Electronics Mock Test - 1 - Question 15
For a full adder implementation, the delay for sum and carry generation are 6 nsec and 3 nsec respectively. The worst-case delay of a 8-bit ripple carry adder will be:
Detailed Solution for BDL MT Electronics Mock Test - 1 - Question 15

Concept:

For an 'n' bit ripple adder, the total time taken by the carry to propagate through to the last stage is:

td = n × tc

tc = delay for carry through a single flip flop.

Calculation:

Given tc = 3 ns

ts = 6 ns

The time taken by the carry to propagate through 8-bit flip flops will be:

td = 8 × 3 ns

td = 24 ns

After 24 ns of time, the time taken by the final sum to be generated will be 3 nsec more, because the time taken by the sum bit to generate is 6 nsec (3 nsec more than the carry propagation delay)

The worst case delay of the given 8-bit ripple carry adder will be:

td = 24 + 3 = 27 nsec

BDL MT Electronics Mock Test - 1 - Question 16

In which type of power amplifier does the output current flow for the entire cycle of input signal?

Detailed Solution for BDL MT Electronics Mock Test - 1 - Question 16
The transistor amplifier in which collector current flows for the entire cycle of input AC signal is called class A amplifier.
The transistor amplifier in which collector current flows for the half-cycle of an AC signal is called a class B amplifier.
The transistor amplifier in which collector current flows for less than half the cycle of an AC signal is called a class C amplifier
BDL MT Electronics Mock Test - 1 - Question 17

Match List-I (Scheme of Feedback) with List-II (Performance Measure) and select the correct answer using the code given below:

Detailed Solution for BDL MT Electronics Mock Test - 1 - Question 17

There are 4 possible combinations for Voltage and Current with which we can sample at the output and mix the feedback to the input.
Sampling:

At the output side, we will take a sample of output since we want to check the behavior of output and we don't want to disturb the output when we take the sample.
That's why when the voltage is sampled, it is in parallel (as the voltage is the same in parallel) and current in series (as the current is the same in series).

Mixing:

In mixing end we want to affect the signal that is provided to the amplifier since that is the actual fundament of giving the feedback.
So, the voltage will be in series and current will be in parallel. So that they can change the input and effect the change in output.

The four basic feedback topologies are as shown:

i) Voltage-sampling voltage-mixing (series-shunt) topology.
ii) current-sampling voltage-mixing (series-series) topology.
iii) current-sampling current-mixing (shunt-series) topology.
iv) voltage-sampling current-mixing (shunt-shunt) topology.
Imortant Point

BDL MT Electronics Mock Test - 1 - Question 18

The reflection coefficient has minimum magnitude at _________

Detailed Solution for BDL MT Electronics Mock Test - 1 - Question 18

On smith chart

P = short circuit (ZL = 0)

Q = matched load

R = open circuit (Z0 = ∞)

Reflection coefficient

TL = ZL - Z0/ZL+Z0

At P

ZL = 0

L| = 1

At Q

ZL = Z0

|Γ| = 0

At R

ZL = ∞

|Γ| = 1

BDL MT Electronics Mock Test - 1 - Question 19

An FM modulation with frequency sensitivity constant kf = 25 Hz/V has the message signal shown below:

The plot for frequency deviation is:

Detailed Solution for BDL MT Electronics Mock Test - 1 - Question 19

A general expression of FM signal is given by

Given the frequency sensitivity of the FM modulator as:
kf = 25 Hz/V
Therefore, the instantaneous frequency deviation for the signal will be:

 = 1/2π x 2π x 25 m (t)
= 25 m(t)
Thus, maximum frequency deviation at any time is the function m(t) simply scaled by kf = 25.

BDL MT Electronics Mock Test - 1 - Question 20

The average age of 30 students is 9 years. If the age of their teacher is included, the average age becomes 10 years, The age of the teacher (in years) is _____.

Detailed Solution for BDL MT Electronics Mock Test - 1 - Question 20

Given:
The average age of 30 student = 9 years
Formula Used:
Average = Sum of the observation/Total observation
Calculation:
For 30 students
9 = (sum of the the age of students)/30
Sum of the age of student = 30 × 9 = 270
If the teacher is included then new average = 10
Total number of teacher and student = 9 + 1 = 10
Then,
31 = (Sum of the age of student + Age of teacher)/10
Age of teacher + sum of the age of student = 310
Age of teacher = 310 - 270 = 40
∴ The age of teacher is 40 years.
Shortcut Trick
Age of teacher = (31 × 10 - 30 × 9) = 310 - 270 = 40

BDL MT Electronics Mock Test - 1 - Question 21
A 100 m long train crosses a bridge of length 300 m in 20 seconds. Find the speed of the train.
Detailed Solution for BDL MT Electronics Mock Test - 1 - Question 21

Given:

Length of train = 100 m

Length of bridge = 300 m

Time is taken to cross the bridge = 20 s

Formula Used:

S = D/T

Where,

S = Speed of train

D = Total distance

T = Time taken

Calculation:

Total distance = Length of train + Length of bridge

⇒ D = 100 + 300

⇒ D = 400 m

S = D/T

⇒ S = 400/20

⇒ S = 20 m/s

∴ The speed of train is 20 m/s.

BDL MT Electronics Mock Test - 1 - Question 22
The diagonal of the rectangle is 17 cm and the length is 15 cm. find the area of the rectangle.
Detailed Solution for BDL MT Electronics Mock Test - 1 - Question 22

Given:

Diagonal of rectangle = 17 cm

Length of the rectangle = 15 cm

Formula:

Diagonal2 = Length2 + Breadth2

Area of the rectangle = Length × Breadth

Calculation:

According to the formula

172 = 152 + Breadth2

⇒ Breadth2 = 289 – 225

⇒ Breadth = √64

⇒ Breadth = 8

∴ Area of the rectangle = 15 × 8 = 120 cm2

BDL MT Electronics Mock Test - 1 - Question 23
The ratio of the monthly income of Radhey and Ranu is 12 ∶ 9 and that their expenditure is 11 ∶ 7 if each of them saves Rs. 18,000 per month, then find the sum of monthly incomes of Radhey and Ranu? (in Rs.)
Detailed Solution for BDL MT Electronics Mock Test - 1 - Question 23

Given:

The ratio of the monthly income of Radhey and Ranu = 12 ∶ 9

The ratio of their expenditure = 11 ∶ 7

Saving of each of them = Rs. 18,000

Formula used

Income = Expenditure + Saving

Calculations:

Let the income of Radhey and Ranu be 12x and 9x

Expenditure of Radhey = 12x – 18000

Expenditure of Ranu = 9x – 18000

According to the question,

⇒ (12x – 18000)/(9x – 18000) = 11/7

⇒ 84x – 126000 = 99x – 198000

⇒ 15x = 72000

⇒ x = 4800

The total income of Radhey and Ranu = 12x + 9x = 21 × 4800 = Rs. 1,00,800

The total income of Radhey and Ranu is Rs. 1,00,800

BDL MT Electronics Mock Test - 1 - Question 24
A box has a length of 10 m, a width of 6 m and a height of 4 m. How many cubes of volume 15 m3 can be accommodated in the box?
Detailed Solution for BDL MT Electronics Mock Test - 1 - Question 24

Given:

Length = 10 m; Width = 6 m; Height = 4 m and Volume of the small cube = 15 m3

Concept:

Volume of a cuboid = Length × Width × Height

Volume of a cube = (side)3

Calculation:

Volume of the box = 10 × 6 × 4 = 240 m3

Volume of the small cube = 15 m3

∴ Number of the small cubes that can be accommodated in the box = 240/15 = 16

Hence, there are 16 cubes that can be accommodated in the box.

BDL MT Electronics Mock Test - 1 - Question 25

Directions: In the following question, some part of the sentence may have errors. Find out which part of the sentence has an error and select the appropriate option. If a sentence is free from error, select 'No Error'.

Neither Rohit nor his friend/(A) was doing their/(B) work properly./(C) No Error(D)
Detailed Solution for BDL MT Electronics Mock Test - 1 - Question 25

The correct answer is B.

Explanation

When the subjects connected by 'or' or 'nor' are of different persons, the verb agrees with the noun that comes closer to it.
Ex: Neither you nor he is responsible for this. (Here the verb 'is' agrees with the third person pronoun he.)
Ex: Either he or you are to clean up the mess. (Here the verb 'are' agrees with the second person pronoun you.)
Here, the pronoun and verb come according to the closer subject His Friend.
We need to replace the pronoun 'their' with 'his'.
Hence, option 2 is the correct answer.

Thus the correct sentence is: Neither Rohit nor his friend was doing his work properly.

Other Related Points

When the pronouns 'Each, every, neither, either, anyone, many a, more than one(possessive adjective)' are used as the subject, the possessive case should be third person singular. They may refer to two or more than two objects or persons.
Each one of us is doing our duty properly. (Use 'his' in place of 'our')
Everyone should do one's duty. (Use 'his' in place of 'one's')
BDL MT Electronics Mock Test - 1 - Question 26

Which of the following is not true about the water made available through dams?

Detailed Solution for BDL MT Electronics Mock Test - 1 - Question 26

The correct answer is 'The water so generated is mainly used in washing.'Explanation

Let's refer to the following lines of the passage:
There has however been hardly any attempt at questioning the extent of damage caused or in evaluating whether the promises of food, water and prosperity for all have actually been realised.
The cost of the project is so stupendous that any water made available will cost so much that governments will have to be forever subsidizing farmers.
What long-term impact this massive borrowing will have on the economy is difficult to foresee.
Option 1, is incorrect because the passage doesn't mention the use of water will be limited to washing only.
Option 2, is correct due to the cost of water made available through dams is high and the government will have to be forever subsidizing farmers.
Option 3, is correct because the passage mentions the promises of food, water and prosperity, which means the water will be mainly used in Agriculture.
Option 4, is correct because the cost of construction of Dam is high as mentioned in the passage.
Thus, from above, the correct answer is option 1.
BDL MT Electronics Mock Test - 1 - Question 27

Select the most appropriate synonym of the given word.
Prosper

Detailed Solution for BDL MT Electronics Mock Test - 1 - Question 27

The correct answer is 'Flourish'.Explanation

The word 'Prosper' means '(of a person or a business) to be or become successful, especially financially.
The synonyms of the word 'Flourish' are "flourish, succeed, thrive".
From the synonym of the given word, we can say that the word 'Flourish' is the most similar in meaning.
The word 'Flourish' means 'to grow or develop successfully'.

Hence, the correct answer is option 1. Let's see the meaning of other given options:-
Other Related Points

The antonyms of the word 'Prosper' are "defeated, come short, fail, fall short, lose, miscarry, miss".
Example of 'Prosper' in a sentence:
Lots of microchip manufacturing companies prospered at that time.
BDL MT Electronics Mock Test - 1 - Question 28

In the following question, select the odd letter/letters from the given alternatives.

Detailed Solution for BDL MT Electronics Mock Test - 1 - Question 28


The Logic here is as follows:
Option 1: GDB

B + 2 = D
D + 3 = G

Option 2: RPN

N + 2 = P
P + 2 = R
Option 3: WUS

S + 2 = U
U + 2 = W
Option 4: MKI

I + 2 = K
K + 2 = M
Therefore, All other options follow a pattern except GDB.
Hence, the correct answer is "GDB".

BDL MT Electronics Mock Test - 1 - Question 29

Direction: In the following question from the given alternatives select the word which cannot be formed using the letters of the given word.

'GRASSHOPPER'

Detailed Solution for BDL MT Electronics Mock Test - 1 - Question 29

Let’s check each option,

1) HOPE → GRASSHOPPER → Can be formed.

2) SHOP → GRASSHOPPER → Can be formed.

3) GRAM → GRASSHOPPER → Can not be formed because GRAM has the letter M, which is not in the given word 'GRASSHOPPER'.

4) ROSE → GRASSHOPPER → Can be formed.

So, only GRAM cannot be formed from GRASSHOPPER.

Hence, "GRAM" is the correct answer.

BDL MT Electronics Mock Test - 1 - Question 30

In the following question below some statements are given followed by some conclusions. Taking the given statements to be true even if they seem to be at variance from commonly known facts, read all the conclusions, and then decide which of the given conclusions logically follows the given statements.
Statements:
Some A are B.
All B are C.
No A are D.
Conclusions:
I. Some A are C.
II. Some B are D.
III. Some D are A.
IV. Some C are not D.

Detailed Solution for BDL MT Electronics Mock Test - 1 - Question 30

The least possible Venn diagram is:

Conclusions:
I. Some A are C - True (As some A are B and All B are C, Some A are C is definitely correct.)
II. Some B are D - False (There is no definite relation between B and D)
III. Some D are A - False (There is a "No" type of relation between D and A so Some type of relation is always invalid.)
IV. Some C are not D -True (As No A is D and some A are B and All B are C, Some C are not D is also true.)
Hence, Only I and IV follow.

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