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GATE Mock Test Electronics Engineering (ECE)- 4 - Electronics and Communication Engineering (ECE) MCQ


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65 Questions MCQ Test GATE ECE (Electronics) 2024 Mock Test Series - GATE Mock Test Electronics Engineering (ECE)- 4

GATE Mock Test Electronics Engineering (ECE)- 4 for Electronics and Communication Engineering (ECE) 2024 is part of GATE ECE (Electronics) 2024 Mock Test Series preparation. The GATE Mock Test Electronics Engineering (ECE)- 4 questions and answers have been prepared according to the Electronics and Communication Engineering (ECE) exam syllabus.The GATE Mock Test Electronics Engineering (ECE)- 4 MCQs are made for Electronics and Communication Engineering (ECE) 2024 Exam. Find important definitions, questions, notes, meanings, examples, exercises, MCQs and online tests for GATE Mock Test Electronics Engineering (ECE)- 4 below.
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GATE Mock Test Electronics Engineering (ECE)- 4 - Question 1

A lent Rs. 5000 to B for 2 years and Rs. 3000 to C for 4 years on simple interest at the same rate of interest and received Rs. 2200 in total from both as interest. The rate of interest per annum is.

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 1
Let the rate % = R

According to the question,

(5000×2×R)/100 + (3000×4×R)/100 = 2200

100R + 120 R = 2200

2200 R = 2200

R = 10%

Hence required rate % = 10%

GATE Mock Test Electronics Engineering (ECE)- 4 - Question 2

Directions: In the following question, a set of three figures X, Y and Z shows a sequence in which a piece of paper is folded and finally cut from a particular section. Below these figures, a set of answer figures marked (a), (b), (c) and (d) shows the design which the paper actually acquires when it is unfolded. You have to select the answer figure which most closely resembles the unfolded piece of paper.

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 2

GATE Mock Test Electronics Engineering (ECE)- 4 - Question 3

The sentences given with blanks are to be filled with an appropriate word(s). Four alternatives are suggested for each question. For each question, choose the correct alternative and click the button corresponding to it.

They abandoned their comrades ______the wolves.

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 3
When something is left in between more than 2 things or persons, ‘among’ is used. There are a number of wolves in the sentence.
GATE Mock Test Electronics Engineering (ECE)- 4 - Question 4

One of the four words given in the four options does not fit the set of words. The odd word from the group is:

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 4
'Hiatus' means 'a pause or break in continuity of a sequence or an activity'. So, options 1, 2 and 3 refer to gap or rest. But, 'end' means 'a termination of a state or situation', thus the odd one out.
GATE Mock Test Electronics Engineering (ECE)- 4 - Question 5

Direction: Study the following information carefully and answer the given questions:

The following pie chart shows the percentage distribution of total number of Apples (Dry + Wet) sold in different days of a week :

The pie chart2 shows the percentage distribution of total number of Apples (Wet) sold in different days of a week.

Find the ratio of Apples (Dry + Wet) sold on Tuesday to that of the Apples (Wet) sold on Thursday?

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 5
Required ratio = 13% of 7000: 23% of 4500 = 182:207
GATE Mock Test Electronics Engineering (ECE)- 4 - Question 6

Directions: In the following question, four positions of the same dice having different characters are shown.

Which character is on the surface opposite to '+'?

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 6
Four characters will be adjacent to each character. As shown, *, ?, # and $ are adjacent to character +. So, the only character that will be opposite to '+' is '@'.
GATE Mock Test Electronics Engineering (ECE)- 4 - Question 7

The question below consists of a set of labelled sentences. These sentences, when properly sequenced form a coherent paragraph. Select the most logical order of sentences from among the options.

P: July 1969 was to see a transformed Indira Gandhi.

Q: Quite a few people contributed with ideas.

R: She sounded the bugle through her historic ‘Note on Economic Policy and Programme’ that was circulated among delegates at Bangalore on July 9, 1969.

S: But the pivot was P.N.Haksar who gave shape, structure and substance with the help of some of his colleagues in the Prime Minister’s Secretariat.

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 7
P is clearly the first sentence as it introduces the main person of the paragraph, i.e. Indira Gandhi. The pronoun ‘she’ in R refers to Indira Gandhi mention in P. Thus, R forms the second statement. Now, in the sentence R, ‘delegates’ is mentioned which says about the people, who are given in the sentence Q. So, sentence Q must follow R.

Thus, the sequence after rearrangement is PRQS

GATE Mock Test Electronics Engineering (ECE)- 4 - Question 8

Directions: Read the given statement carefully and answer the question that follows.

Statement: There were different streams of freedom movements in colonial India carried out by the moderates, liberals, radicals, socialists and so on.

Which of the following is the best inference from the above statement?

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 8
Hetero means different. It is clearly mentioned that the movement comprised of moderates, liberals, radicals, socialists and so on.
GATE Mock Test Electronics Engineering (ECE)- 4 - Question 9

Direction: Read the information carefully and give the answer of the following questions:

Total number of children = 2000

If two-ninths of the children who play football are females, then the number of male football children is approximately what percent of the total number of children who play cricket?

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 9
57.4% (If 2/9 th of children play football are female , then male children = 1 - 2/9 = 7/9th of children play football;

Let's take z% of male football children equal to cricket children , then

=> z% of cricket children = 7/9 th of football;

=> z% of (23% of 2000) = 7/9 th of (17% of 2000);

=> z% of 23 = 7/9 th of 17

=> z = 7× 17 × 100 = 57.4%

Short-cut :

Required percentage = (7/9)×17×100/ 23 = 57.4%

GATE Mock Test Electronics Engineering (ECE)- 4 - Question 10

A bottle of whisky contains 3/4th whisky and the rest is water. What quantity of the mixture must be taken away and substituted by equal quantity of water to have half whisky and half water?

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 10
Percentage of whisky in mixture = 75%

Percentage of whisky in water = 0%

Therefore, mixture and water should be mixed in the ratio of 2 : 1.

or,

We need to replace 1/3rd or of the mixture with water.

GATE Mock Test Electronics Engineering (ECE)- 4 - Question 11

Determine Rth ands Vth for this network?

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 11
According to Millman’s theorem the expressions for total voltage and total resistance is given by,

Vth = V1G1+V2G2+V3G3/(G1+G2+G3)

Rth = 1/ (G1+G2+G3)

G1 = 1/4, G2 = 1/5, G3 = 1/6

V1 = 3V, V2 = 5V, V3 = 7V

Vth = 4.729V, Rth = 1.62Ω

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 4 - Question 12

A card is drawn at random from an ordinary deck of 52 playing cards. If we are told that card is heart, then information, in bits, is(Answer up to the nearest integer)


Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 12
P (heart) = 13/52 =1/4

I = log24 = 2 bits

GATE Mock Test Electronics Engineering (ECE)- 4 - Question 13

Which of the following is CORRECT with respect to LAG-LEAD compensator?

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 13
The lag-lead compensation pole is more dominating than the zero and because of this lag-lead network may introduces positive phase angle to the system when connected in series.

Lead-leg compensators have different frequencies for the zero and the pole. Based on the difference of the two frequencies we get different static gains below the lower frequency and above the higher frequency.

GATE Mock Test Electronics Engineering (ECE)- 4 - Question 14

A 60 Ω coaxial cable feeds a 75 + j 25Ω + dipole antenna. The voltage reflection coefficient Γ and standing wave ratio s are respectively

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 14

GATE Mock Test Electronics Engineering (ECE)- 4 - Question 15

Find the differential equation whose solution represents the family c(y + c)2 = x3

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 15
c(y+c)2 = x3

Differentiating, we get

2c(y + c)dx/dx = 3x2

Pitting this value of 'c' in equation

GATE Mock Test Electronics Engineering (ECE)- 4 - Question 16

If A is a 3-rowed square matrix such that |A| = 2, then |adj(adj (adj A2))| is equal to

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 16
Let B = adj(adjA2), then B is also 3 by 3 matrix

Now,

|adj(B)| = |B|3 -1 = |B|2 = |adj(adjA2)|2 = ((|adjA2|)3 - 1)2 = |adjA2|4 = |adjA|8 = (|A|)3 - 1)8 = |A|16 = 216

GATE Mock Test Electronics Engineering (ECE)- 4 - Question 17

The transfer function of a phase lead controller is given as

Gc(s)=(1+αTs)/(1+Ts) where a > 1 and T is a constant depending on circuit parameter Determine the maximum value of phase lead which can be obtained from the controller.

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 17
For phase lead controller

⇒ puts = jω

Gc(jω) = 1+jaTω/1+jTω

ϕ = ∠Gc(jω)

= tan−1⁡aωT − tan−1⁡ωT

tan⁡ϕ = ωT(a−1)/1+ω2T2…………………(i)

For getting maximum value of phase angle

dϕ/dω = 0

We get ωm = 1/T√a

Putting ωminq

tan⁡ϕm = 0−1/2√a or ϕm

=tan−1⁡[a−1/2√a]

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 4 - Question 18

A rectangular waveguide of internal dimensions (a = 4 cm and b = 3 cm) is to be operated in TE11 mode. The minimum operating frequency is (Answer up to two decimal places)


Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 18
Cut -off Frequency is

For TE11 mode,

GATE Mock Test Electronics Engineering (ECE)- 4 - Question 19

In the circuit shown in fig the op-amp is ideal. If βF= 60, then the total current supplied by the 15 V source is;

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 19
v+ = 5v

= v = vE

i+15V = iz + ic

= iz + aF + iE

The input current to the op-amp is zero.

= 49.4 mA

GATE Mock Test Electronics Engineering (ECE)- 4 - Question 20

A random process has the power density Pxx(ω) = 6ω2/[1 + ω2]3 . The average power in process is

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 20

= 3/8

GATE Mock Test Electronics Engineering (ECE)- 4 - Question 21

Let A be a 3 x 3 matrix with eigen values 1, -1 and 3. Then

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 21
Singular Matrices have Zero Eigenvalues. Suppose A is a square matrix. Then A is singular if and only if λ=0 is an eigenvalue of A.

Eigen values ofA2+ A are 2,0,12

Eigen values of A2 - A are 0,2,6,

Eigen values of A2 +3A are 4,-2,18

Eigen values of A2 - 3A are -2,4,0.

GATE Mock Test Electronics Engineering (ECE)- 4 - Question 22

Consider the ufb system shown below:

The root - loci, as α is varied, will be

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 22

Thus an equivalent system has G(s) = 1/(s2 + 1) and H(s) = αs. For this function root-locus is (2).

GATE Mock Test Electronics Engineering (ECE)- 4 - Question 23

For the lattice circuit shown in Figure,Za = j2 and Zb = 2. The values of the open circuit impedance parameters

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 23

We know that

V1 = z11I1 + z12I2

V2 = z11I1 + z22I2

where

Consider the given lattice network, when I2=0. There is two similar path in the circuit for the current I1

So I = 1/2I1

For z11 applying KVL at input port, we get

For this circuit z11

= z22 and z12

= z21. Thus

Here Za = 2jΩ&Zb

= 2Ω

Hence Z11

= (2+2j)/2

= 1 + j;Z22 = 1 + j

Z21 = (2j − 2)/2

= −1 + j

= Z12

GATE Mock Test Electronics Engineering (ECE)- 4 - Question 24

The Fourier Series coefficient for the periodic signal shown below is

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 24

T = 2π, ωo = 2π/2π = 1,

GATE Mock Test Electronics Engineering (ECE)- 4 - Question 25

For the circuit in fig let β = 100. The values of Q-point (ICQ .VCEQ) is;

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 25
R1 = 12kΩ, R2 = 2kΩ

RTH = R1 || R2 = 12 || 2 = 1.71 kΩ

3.57 = 1.71k × IBQ + VBE + (β + 1)IBQ × 0.5k − 5

5 − 3.57 − 0.7

= (1.71 + 50.5)IBQ

IBQ = 14μA

IEQ = (100 + 1)IBQ

= 1.412mA

ICQ = 100IBQ

= 1.4mA

VCEQ = 5 − RCICQ − REIBQ + 5

= 5 − (5)(1.4) − (0.5)(1.412) + 5

= 2.3V

GATE Mock Test Electronics Engineering (ECE)- 4 - Question 26

Consider two signals x [n] = {1, 2, - 1} and h [n] = x [n]. The convolution y [n] = x [n] x h [n] is

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 26
y[n] = {1, 4, 2, -4, 1}

GATE Mock Test Electronics Engineering (ECE)- 4 - Question 27

For the AM envelope shown below, determine the total power transmitted is _____W.

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 27
From the envelope shown

Vmax = 10…(1)

Vmin = 2V…(2)

But Vmax = Ac(1 + μ)…(3)

Vmin = Ac(1 − μ)…(4)

From (1),(2),(3),(4)

1 + μ/1 − μ = 10/2 = 5

⇒ μ = 2/3 = 0.67

⇒ Ac = 6V

Peak amplitude of Carrier = AC = 6V

Modulation coefficient = μ = 2/3 = 0.67

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 4 - Question 28

At 20 GHz, the approximate gain of a parabolic dish antenna of 1 metre and 70% efficiency is(Answer up to two decimal places)


Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 28
λ = c/f = (3 x 108)/(20 x 109) = 3/200

= 44.87 dB

GATE Mock Test Electronics Engineering (ECE)- 4 - Question 29

The inverse z-transform of the signal X(z)= In (α/α - z-1); ROC : |z| > 1/α

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 29
Given X(z) = In (α/α - z-1); ROC : |z| > 1/α

= - in(1 - (αz)-1)

now expanding it by Taylor series, we get

Taking the inverse z - transform, we get

GATE Mock Test Electronics Engineering (ECE)- 4 - Question 30

The simplified form of a logic function is

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 30

GATE Mock Test Electronics Engineering (ECE)- 4 - Question 31

The oscillator circuit shown in figure has n ideal inverting amplifier. Its frequency of oscillation (in Hz) is;

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 31
The given circuit is a R-C phase shift oscillator and frequency of its oscillation is

GATE Mock Test Electronics Engineering (ECE)- 4 - Question 32

If the input to the following ideal comparator is a sinusoidal signal of 8 V (peak to peak) without any DC component, the output of the comparator has a duty cycle of

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 32

When vi > 2 V, output is positive. When vi < 2 V, output is negative. The waveform is as shown below:

GATE Mock Test Electronics Engineering (ECE)- 4 - Question 33

Frequency of an local oscillator in a AM standard broadcast receiver having on IF as 455kHz and tuned in 540kHz when local oscillator tracks above the frequency of received signal is;

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 33
fLo = fIF + fC

= 455 × 103 + 540 × 103

= 995 kHz

GATE Mock Test Electronics Engineering (ECE)- 4 - Question 34

Increasing the yield of an IC

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 34
Increasing the yield of an IC reduces individual circuit cost. The ability to improve the yield of integrated circuits through layout modification has been recognized and several techniques for yield enhanced routing and compaction have been developed.
GATE Mock Test Electronics Engineering (ECE)- 4 - Question 35

In the circuit shown, VC is 0 volts at t = 0 sec. For t > 0, the capacitor current ic (t), where t in seconds, is given by;

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 35
at = 0+ Capacitor is a short circuit and at t = ∞ Capacitor is an open circuit

Solc(0+)=10V/20kΩ = 0.5mA

Ic(∞) = 0

Time constant of the circuit τ = ReqC T = 4

τ = 4μF × 20kΩ‖20kΩ

⇒ τ = 40m sec

Using direction formula Ic(t) = Ic(∞) − [Ic(∞) − lc(0)]e−t/τ

Ic(t) = 0 − [0 − 0.5]e−t/40msec

Ic(t) = 0.5e−25tmA

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 4 - Question 36

Two p+ n silicon junction is reverse biased at VR = 5 V. The impurity doping concentration in junction A are Na = 1018 cm-3 and Nd = 10-15 cm-3 and those in junction B are Na = 1018 cm-3 and 10 cm-3, Nd = 1016 cm-3. The ratio of the space charge width is ______. (Answer up to two decimal places)


Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 36

GATE Mock Test Electronics Engineering (ECE)- 4 - Question 37

Consider the circuit shown below;

If VBE=0.7V and VCE = 5V then the value of R is

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 37

kvl in collector to emitter side

−25 + 5(IB + IC) + 5 + 270(IB + IC) = 0

−25 + 5(IB + IC) + 5 + 270(IB + IC) = 0

∵ IC = βIB = 100IB

∴ BY(1)&(2)

now

IBR + 0.7 = VCE = 5

R = 5 − 0.7/0.72 = 5.97 MΩ

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 4 - Question 38

A speed signal, band limited to 4 kHz and peak voltage varying between + 5 V and - 5 V, is sampled at the Nyquist rate. Each sample is quantized and represented by 8 bits.

If the bits 0 and 1 are transmitted using bipolar pulses, the minimum bandwidth required for distortion free transmission is (Answer up to the nearest integer)


Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 38
Fm = 4 KHz

fs = 2fm = 8 kHz

Bit Rate Rb = nfs = 8 x 8 = 64 kbps

The minimum transmission bandwidth is

BW = Rb/2 = 32 kHz

GATE Mock Test Electronics Engineering (ECE)- 4 - Question 39

A semiconductor having electron mobility μn = 7500 cm2/V-sec, hole mobility μp=300 cm2/V-sec, intrinsic carrier concentration as 13.6×1011/cm3 is kept at 300°K. The maximum value of resistivity is _________ Ω-m.

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 39

n = ni2

σ = qμnn + qμρρ = qμnni22 + qμρρ

For non conductivity dσ/dρ = 0 = -qμnni22 + qμρ

= 68 x 1011/cm3

σmin = 6.528 x 10-4 V/cm

Σmin = 1/σmax = 1/6.528 x 10-4

= 15.318 Ω-m

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 4 - Question 40

A speed signal, band limited to 4 kHz and peak voltage varying between + 5 V and - 5 V are sampled at the Nyquist rate. Each sample is quantized and represented by 8 bits. What is the number of quantization levels required to reduce the quantization noise by a factor of 4? (Answer up to the nearest integer)


Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 40
As Noise ∝ 1/L2

To reduce quantization noise by factor 4, quantization level must be two times i.e. 2L.

Now L = 2n = 28 = 256

Thus 2L = 512

GATE Mock Test Electronics Engineering (ECE)- 4 - Question 41

Which of the following semi-conductor parameters vary with temperature?

  1. Intrinsic concentration (ηi)

  2. Mobility (μ)

  3. Conductivity (σ)

  4. Energy gap (EG)

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 41
All the given vary with change in temperature. Their mathematical relation with temperature is given as

→ ηi2 = A0 T3. exp (-EGO/kT)

→ μ= T-m ; m = 2.5 for electrons and 2.7 for holes

→ σ = σ0 [1+α(T-To)]

→ EG (T) = EG0 - βT

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 4 - Question 42

The capacity of a Binary Symmetric Channel (BSC) with cross-over probability 0.5 is _____. (Answer up to the nearest integer)


Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 42
Given the binary symmetric channel (BSC) with crossover probability 0.6. So, we have

p = 0.6

so, the entropy is given as

H(p) = Σp log21/p

= 0.5log21/0.5 + 0.5log21/0.5 = 0.5 + 0.5 =1

Hence, the capacity of channel is

1 - H(p) =1-1 = 0

GATE Mock Test Electronics Engineering (ECE)- 4 - Question 43

In the circuit shown, the Norton equivalent resistance (in Ω) across terminals a - b is ______.

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 43

To find Norton equivalent, an external source V0 is applied and current through it is 10. So, we have

Req = V0/I0

I0 = V0/4 + V0/2 + V0/2 − 2(V0/4)

I0 = V0(1/2 + 1/4)

I0 = V0(3/4)

V0/I0 = 4/3 = 1.333

GATE Mock Test Electronics Engineering (ECE)- 4 - Question 44

For dy/dx = x + y2, given that y = 0 at x = 0. Using Picard`s method up to third order of approximation of the solution of the differential equation is

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 44
Here f(x, y) = x + y2, x0 = 0, y0 = 0

We have, by Picard's method,

The first approximation to y is given by

The second approximation to y is given by

The second approximation to y is given by

The third approximation is given by

GATE Mock Test Electronics Engineering (ECE)- 4 - Question 45

The similarities between offset QPSK and MSK are

(A) Both are form of frequency modulation

(B) Both have a half-symbol delay between the in-phase component of each data symbol

(C) Both have same probability of error.

(D) Both have same basis function

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 45

QPSK is form of phase modulation whereas MSK is form of frequency modulation

Both have a half-symbol delay between the in-phase and quadrature components of each data symbol.

The basis functions for offset QPSK are sinusoids multiplied by a rectangle function, white the basis functions for MSK are sinusoids multiplied by half a cosine pulse.

GATE Mock Test Electronics Engineering (ECE)- 4 - Question 46

The root-loci for α > 0 with K = 10 is

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 46

  1. Is not a valid root - loci because all root - loci ends on a zero. (B) is also not a valid root loci because loci exist to the left of even number of pole.

Characteristic equation is

s3 + 10s2 + (29 + 10α)s + 30α = 0

For α ≤ 0 root - loci does not intersect the imaginary axis.

GATE Mock Test Electronics Engineering (ECE)- 4 - Question 47

A random process consists of three samples function

X(t,s1 ) = 2,X(t,s2) = 2 cos t1 and X(t,s3) =sin t

each occurring with equal probability. The process is;

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 47
Let x1 = 2,x2 = 2cos⁡t1

And x3 = 3sin⁡t

Then

fx(x) = 1/3δ(x − x1) + 1/3δ(x − x2) + 1/3δ(x − x3)

And

E[X(t)]=∫−∞xfx(x)dx

= 1/3[2 + 2cos⁡t + 3sin⁡t]

The mean value is time dependent so X(t) is not stationary in any sense.

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 4 - Question 48

The volume under the surface z(x, y) = x + y and above the triangle in the x – y plane defined by {0 ≤ y ≤ x and 0 ≤ x ≤ 12} is _____.(Answer up to the nearest integer)


Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 48

We have the triangular surface in x-y plane as shown in figure below.

Also, we have the surface

Z(x,y) = x + y

So, the volume under the surface and above the triangular surface is given as

= 864

GATE Mock Test Electronics Engineering (ECE)- 4 - Question 49

According to the Mean Value Theorem for a continuous function f(x) in the interval [a,b], there exists a value ξ in this interval such that ; ∫ab f(x)dx =

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 49
ab f(x)dx = b⋅

f(b) − a ⋅ f(a)………(1)

This implies that within interval [a,b] there exists a value ξ such that

f(ξ) = b⋅f(b)−a⋅f(a)/(b−a)

f(ξ)(b−a) = b⋅

f(b) − a ⋅ f(a)………(2

From (1) and (2) , ∫ab f(x)dx = f(ξ) (b − a)

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 4 - Question 50

A CT signal is given as

x (t) = 5 rect (1/2)*[δ(t + 1) + δ(t)]

Then value of x (1/2) is ______. (Answer up to the nearest integer)


Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 50
x (t) = 5 rect (1/2)*[δ(t + 1) + δ(t)]

by convolution property

g(t) * δ(t - t0) = g(t - t0)

so x(t) = 5 rect(t/2) × δ(t + 1) + 5 rect(t/2) × δ(t)

x(t) = 5 rect [(t + 1)/2] + 5 rect(t/2)

x(1/2) = 5 rect(3/4) + 5 rect(1/4)

= 5(0) + 5(1) = 5

GATE Mock Test Electronics Engineering (ECE)- 4 - Question 51

The equivalent of a two-port network in terms of open circuit impedance parameters is shown below

Another way of representing same network is;

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 51
From the given figure

V1 = Z11I1 + Z12I2

V2 = Z22I2 + Z21I1

= +Z21I1 + Z22I2

The above equations can be rearranged as

V1 = (Z11 − Z12)I1 + Z12(I1 + I2)

V2 = (Z21− Z12)I1 + (Z22 − Z12)I2 + Z12(I1 + I2)

⇒ generator equivalent is

GATE Mock Test Electronics Engineering (ECE)- 4 - Question 52

n the circuit given below, vm (t) = 10μ(t), the current iL (t) is

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 52
thevenin equivalent across the inductor for t > 0 can be obtained as

By applying node equation

For thevenin’s equivalent circuit

GATE Mock Test Electronics Engineering (ECE)- 4 - Question 53

Given a signal x[n] = 4(1/3)n COS[2πn/6] u[n]. If the z -transform of signal x[n] is X(z) then which of the following diagram can represent pole location of X (z) on the z -plane.

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 53
Given the signal x[n] = 7(1/3)ncos⁡[2πn/6]u[n]

z - transform of cos⁡(ω0n)u[n] is (z2 − zcos⁡ω0)/(z2−2zcos⁡ω0+1)

so the poles of z - transform of cos⁡(ω0n)n[n] are given by (z2−2zcos⁡ω0+1) = 0

(z − e−jωo) (z − ejωo) = 0

poles of z - transform of (1/3)n cos⁡ω0n will be given by (3z − e−jω0)(3z − e0) = 0

for the given signal, ω0 = π/3

: poles will be given by (3z − e−jπ/3)(3z − ejπ/3) = 0

poles will lie at

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 4 - Question 54

In the following circuit, the comparators output is logic "1" if V1 > V2 and is logic "0" otherwise. The D / A conversion is done as per the relation VDAC = Volts, where b3

(MSB), b1, b2 and b0 (LSB) are the counter outputs. The counter starts from the clear state.

The stable reading of the LED displays is (Answer up to the nearest integer)


Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 54

We have,

or VDAC = 0.5b0 + b1 + 2b2 + 4b3

The counter outputs will increase by 1 from 0000 till Vth > VDAC. The output of counter and VDAC is as shown below

and when VADC = 6.5 V (at 1101), the output of AND is zero and the counter stops.

The stable output of LED display is 13.

GATE Mock Test Electronics Engineering (ECE)- 4 - Question 55

Le-2t [u(t) - u(t - 1)] = ?

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 55

Let p(t) = u(t) - u(t - 1)

∴ P(s) = 1/s - e-s/s

∴ P(s) = (1 - e-s)/s

Now let f(t) = e-2t p(t)

∴ F(s) = P(s + 2)

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 4 - Question 56

When the optical power incident on a photodiode is 10 μ W and the responsivity is 0.8 A/W, the photocurrent generated (in μ A) is _____.


Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 56
The responsivity is define as

R = IP/P

Where IP is photocurrent, and P is optical power incident on photodiode. Hence

IP = PR

= (10μW)(0.8 A/W)

= 10 x 10-6 x 0.8

= 8 x 10-6 A

= 8μA

GATE Mock Test Electronics Engineering (ECE)- 4 - Question 57

Consider a random process X(t)= 3V(t) - 8, where V(t) is a zero-mean stationary random process with autocorrelation Ru(T)= 4E-5|T| . The power in P(1&X(t)) is;

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 57
X(t) = 3V(t)- 8

Rx (t) = E [x(t) × (t+τ)]

= E(3v(t) - 8)(3v(t + τ) - 8)]

= E[(9v(t) v (t+τ) - 24v(t) - 24v(t+τ) + 64]

= 9 Rv (τ) - 48 E[v[t] + 64

Px (τ):-∘

= Power in X (t) = 9Rv (0) + 64

= 36 + 64 = 100w

GATE Mock Test Electronics Engineering (ECE)- 4 - Question 58

Consider the system shown below:

The controllability matrix for this system is

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 58

GATE Mock Test Electronics Engineering (ECE)- 4 - Question 59

Consider the following statements:

  1. The derivative control improves the overshoots of a given system.

  2. The derivative control reduces steady-state error.

  3. Integral control reduced state-state error.

  4. Integral control does not affect stability.

Of these statements:

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 59
Integral Controller behaves like a LPF and we know that LPF reduces the steady state error while Derivative Controller behaves like HPF which improves the overshoots of system.
*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 4 - Question 60

A continuous, linear time-invariant filter has an impulse response h (t) described by

h (t) =

When a constant input of values 5 is applied to this filter, the steady state output is ________


Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 60

Given the impulse response of LTI filter,

And the input to the filter,

x(t) = 5 for all t

So, we obtain the output of the filter as

y(x) = x(t) * h(t)

for all t

= 15[τ]03 for all t

= 15(3 - 0) for all t

= 45 for all t

Thus, the steady state value of output is

GATE Mock Test Electronics Engineering (ECE)- 4 - Question 61

The transfer function of a phase lead controller is (1 + 3Ts) / (1 + Ts). The maximum value of phase provided by this controller is;

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 61
Given transfer function -

α = Z/P

Here, Z = 1/3T and P = 1/T

Maximum phase shift -

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 4 - Question 62

Five JK flip-flops are cascaded to form the circuit shown in Figure. Clock pulses at a frequency of 1 MHz are applied as shown. The frequency (in kHz) of the waveform is ________.(Answer up to one decimal place)


Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 62

Given the cascaded flip-flops

We observe that the circuit is a ripple counter or asynchronous counter. So, we have the output of the cascaded flip-flops as

So, the waveform at Qs changes its state after 24 = 16 clock pulses. Hence, the frequency of waveform at Qs is given as

Fs = fclock/16

= 1 MHz/16 = 1000/16 kHz

= 62.5 kHz

GATE Mock Test Electronics Engineering (ECE)- 4 - Question 63

A two-faced fair coin has its faces designated as head (H) and tail (T). This coin is tossed three times in succession to record the following outcomes: H, H, H.

If the coin is tossed one more time, the probability (up to one decimal place) of obtaining H again, given the previous realizations of H, H and H, would be______

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 63
Given first three are already heads. If the coin is tossed again, the outcome does not depend on previous outcomes.

Probability getting head =1/2 = 0.5

GATE Mock Test Electronics Engineering (ECE)- 4 - Question 64

For the circuit shown, if the power consumed by 5 Ω resistor is 10 W, then:

  1. |I| = √2 A
  2. Total impedance = 5 Ω
  3. Power factor = 0.866

Which of the above are correct?

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 64

1. Power consumed by 5 Ω is10 W.

I25 = 10

⇒ I = √2 Amps

2. Total impedance Z = (10 + 5 + j 15/13) Ω

3. Power factor cos Φ =

= 0.866

GATE Mock Test Electronics Engineering (ECE)- 4 - Question 65

Consider the program given below for INTEL 8085

MVI C, 0B H

LXI H, 2400 H

LXI D, 3400 H

LOOP MOV A, M

STAX D

INR L

INR E

DCR C

JNZ LOOP

HLT

The total number of memory accesses required are _______.

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 4 - Question 65
Memory Access

MVI C, 0B H 2

LXI H, 2400 H 3

LXI D, 3400 H 3

LOOP MOV A, M 2

STAX D 2

INR L 1

INR E 1

DCR C 1

JNZ LOOP 3/2

HLT 1

Loop executes 11 times

Total memory accesses are

= 2 + 3 + 3 + 11(2 + 2 + 1 + 1 + 1) + 10 × 3 + 2 + 1

= 118

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