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GATE Mock Test Electronics Engineering (ECE)- 7 - Electronics and Communication Engineering (ECE) MCQ


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65 Questions MCQ Test GATE ECE (Electronics) 2024 Mock Test Series - GATE Mock Test Electronics Engineering (ECE)- 7

GATE Mock Test Electronics Engineering (ECE)- 7 for Electronics and Communication Engineering (ECE) 2024 is part of GATE ECE (Electronics) 2024 Mock Test Series preparation. The GATE Mock Test Electronics Engineering (ECE)- 7 questions and answers have been prepared according to the Electronics and Communication Engineering (ECE) exam syllabus.The GATE Mock Test Electronics Engineering (ECE)- 7 MCQs are made for Electronics and Communication Engineering (ECE) 2024 Exam. Find important definitions, questions, notes, meanings, examples, exercises, MCQs and online tests for GATE Mock Test Electronics Engineering (ECE)- 7 below.
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GATE Mock Test Electronics Engineering (ECE)- 7 - Question 1

There are two lines made by joining points A, B,C. B lies between the line joining A and C. Is the distance between the A and C passes through the B more then 7 Km.

  1. The distance between A and B is 6 Km

  2. Distance between B to C is 7 Km long,

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 1
From Statement 1

We know the distance between Points B and C but we do not know about the distance between A and B

Statement 2

This statement tells us about the distance between A and B and by using Both statement we can calculate the distance between A and C that is longer than the 7 Km.

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 2

Directions: In the following question, a set of three figures X, Y and Z shows a sequence in which a paper is folded and finally cut from a particular section. Below these figures, a set of answer figures (a), (b), (c) and (d) shows the design which the paper actually acquires when it is unfolded. You have to select the answer figure which most closely resembles the unfolded piece of paper.

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 2

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 3

Which of the following is the MOST SIMILAR in meaning to Accreditation?

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 3
Accreditation = an acknowledgement of a person's responsibility for or achievement of something.

Certification = an official document attesting to a status or level of achievement.

Meticulous = showing great attention to detail; very careful and precise.

Lurid = very vividly shocking.

Suppressive = tending or acting to suppress.

Agreement = harmony or accordance in opinion or feeling.

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 4

The number lock of a suitcase has 4 wheels, each labelled with ten digits, i.e. from 0 to 9. The lock opens with a sequence of four digits with no repeats. What is the probability of a person getting the sequence to open the suitcase?

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 4
There are 10c4 x 4! = 5040 sequences of 4 distinct digits, out of which there is only one sequence in which the lock opens.

Required probability = 1 / 5040

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 5

Direction: In the question below are given statements followed by some conclusions. You have to take the given statements to be true even if they seem to be at variance with commonly known facts. Read all the conclusions and then decide which of the given conclusions logically follows from the given statements disregarding commonly known facts.

Statement:

  1. No physics is maths.
  2. Some chemistry is maths.
  3. All sciences are chemistry.

Conclusion:

  1. No science is physics.
  2. Some physics are science.
  3. Some physics are chemistry.
Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 5

The least possible Venn diagram for the given statements is as follows.

Conclusions:

  1. No science is physics → False (It is possible but not definite).
  2. Some physics are science → False (It is possible but not definite)
  3. Some physics are chemistry → False (It is possible but not definite)

 

Conclusion I and II form complementary pair.

Hence, either conclusion I or II follows.

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 6

Directions: The table lists the size of building lots in the Orange Grove subdivision and the people who are planning to build on those lots. For each lot, installation of utilities costs $12,516. The city charges impact fees of $3,879 per lot. There are also development fees of 16.15 cents per square foot of land.

What approximate percentage is the area of the smallest lot listed, as compared to the area of the largest lot?

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 6
The smallest lot is 6,699 square feet and the largest lot is 9,004 square feet.

Required percentage = (6699/9004) × 100 = 0.744 × 100 ≈ 75%

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 7

Direction: Two sentences with two blanks in each, followed by five alternatives with two words in each, are given. Choose that option as the answer which can fill both the blanks of both the sentences.

  1. A sinking feeling of panic ________ over them and a temporary paralyzing fear engulfed them ________.

  2. Being a cleanliness freak, she ________ the floor and went down to the market only after the house was _________ clean.

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 7
‘Sweep’ is to clean (an area) by brushing away dirt or litter. It fits the first blank of the second sentence, as the subject is cleaning the floor. Further, ‘sweep over’ means to overcome or overwhelm, thus fits in the first blank of the first sentence. The second blank of both the sentences can be filled by "completely", thus conveying an appropriate sense.
GATE Mock Test Electronics Engineering (ECE)- 7 - Question 8

Directions: In the following question, a set of three figures X, Y and Z shows a sequence in which a paper is folded and finally cut from a particular section. Below these figures, a set of answer figures (a), (b), (c) and (d) shows the design which the paper actually acquires when it is unfolded. You have to select the answer figure which most closely resembles the unfolded piece of paper.

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 8

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 9

4 identical solid spheres are melted and re-formed into a solid hemisphere. Then, the ratio of the curved surface area of the hemisphere to half of the surface area of a single sphere is -

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 9
Let radius of sphere be ‘r’ and radius of hemisphere be ‘R’.

Then,

ATQ,

Volume of Spheres = Volume of Hemisphere

4 x (4/3)πr3 = (2/3)πR3

Or, R / r = (8)1/3 = 2 …(1)

C.S.A of hemisphere = 2πR2

And, Surface area of sphere = 4πr2

ATQ,

2πR2 :( ½) of 4πr2

= 2πR2 :2πr2 = R2 :r2 {using (1)}

= 4 :1

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 10

If prices are reduced by 20% and sales are increased by 15%, what is the net effect on gross receipts?

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 10
Let original price = p, and original sales = s.

Therefore, original gross receipts = ps. Let new price = 0.80p, and new sales = 1.15s.

Therefore, new gross receipts = 0.92ps. Gross receipts are only 92% of what they were.

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 11

The bilateral Laplace transform of u (- t + 5) is

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 11
X(s) = -u (- t + 5) e-st dt

= -5e-st dt

= -e-5s / s, Re(s) < 0

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 12

If |z| < 1, then Laurent series expansion of function is

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 12

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 13

If Where, C: circle x2+y2=16 then the value of F(6)is

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 13

Since, the pole z=6 lies outside the contour because the radius of circle is 4 and center lies at origin, thus the contour integral is zero by Cauchy’s Integral Theorem.

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 14

Consider a ufb system with forward-path transfer function G (s) = . The system is stable for the range of K.

Which of the following is correct?

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 14
G(s) = K(s + 3)/s4(s + 2)

It can be written as:

G(s) = K(s + 3)/(s5 + 2s4 + ks + 1)

Roth-Hurwitz stability criterion states that the necessary and sufficient condition for stability is that all the elements in the first column of the Routh array should be positive. If the condition is not satisfied, then the system is unstable.

The characteristic equation for this is s5 + 2s4 + ks + 1 = 0.

In the first column of the Routh array for the given characteristic equation, the value corresponding to s1 is -2, which is not positive. So, the system is unstable.

Alternate solution

In the given ufb system, the values of s3 and s2 are missing. Hence, it is always unstable.

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 15

Three identical cascaded amplifier stages have an overall upper 3 dB frequency of 20KHz and a lower 3 dB frequency of 20Hz. What are fL and fH respectively. Assume non- interacting stages.

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 15

fL = 10.19 KHz

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 7 - Question 16

The characteristic equation of a closed-loop system is s(s + 1)(s + 2) + k = 0. The centroid of the asymptotes in root-locus will be (Answer up to the nearest integer)


Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 16
Sum of poles = 0 - 1 - 2 = -3

Sum of zeros = 0

Therefore, no. of poles - no.of zeros = No. of values for which response is infinite.

So, there are 3 poles and none zeros.

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 17

The open loop transfer function of a unity feedback control system is given by

Find the value of ‘K’ at which the root locus diagram of the system intersects the imaginary axis.

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 17
After crossing the imaginary axis from LHP to RHP the system will become unstable, thus imaginary axis crossing point is a marginal stable situation. It can be found by Routh-Hurwitz criterion.

Characteristic equation system is

1 + G(s) = 0

⇒ s(s + 2)(s + 5) + K = 0

⇒ s3 + 7s2 + 10s + K = 0

Making Routh Table,

s3s2s1s01107K1/7(70−k)0K0

When its marginal stable then,

1/7(70−K)=0 ⇒ K = 70

Hence, the value of ‘K’ at the crossing point of imaginary axis is 70.

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 18

Stability of a power system can be improved by:

  1. Using series compensators

  2. Using parallel transmission lines

  3. Reducing voltage of transmission

Which of the above statements is/are correct?

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 18
Stability of a power system can be improved by
  1. higher system voltage

  2. the use of parallel lines to reduce the series reactance

  3. the use of high speed circuit breakers and auto-reclosing breakers

  4. reducing the series reactance thereby increasing Pm which increases the transient stability limit of a system

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 19

A random variable x takes two values 0 and 1 with probability of x = 0is p. If x follows binomial distribution, then the mean and variance of number of 0's is given respectively by

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 19
We can derive that, for binomial distribution,

P(X = r) = nCr.pr.(1 - p)n-r

Mean = np

Variance = np(1 - p)

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 20

A MUX network is shown below.

The function Z1 is equal to 1 when

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 20
According to the circuit of MUXs: Z1 = 1 when Z0 = 0 otherwise Z1 is equal to 0. Z0 = 0 when b = 1, at this time a = 0.

Z1 = a' . b . c

Also one cannot represent the operation of MUX in simple binary expression unless the conditions are met.

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 21

If a periodic signal xp(t) has the Fourier coefficient X(k), and when the signal is delayed by 2sec its 5th harmonic gets delayed in phase by 0.1 radian, the fundamental frequency of the signal in milli rad/sec is

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 21
When the signal is delayed by 2 sec kth harmonic gets phase delayed by kw02

It is given that 5w02 = 0.1

10w0 = 0.1

w0 = 0.01 = 10 milli rad/sec

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 22

Assuming i = √ - 1 and t as a real number , is

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 22

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 23

The following waveform is to be quantized with a maximum of ± 0.5 Volts/sample error. What should be the space between quantization levels

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 23

Maximum quantization error does not depend on the waveform but the spacing between quantization levels. For a maximum of ±0.5 Volts quantization error we must have a maximum spacing of 1 V between the levels.

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 24

If the base width of a bi-polar transistor is increased by a factor of 3, what is the collector current change?

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 24
We know

So, if WB increases by a factor of 3, then IC is decreased by a factor of 3.

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 25

Find the location of roots of characteristic equation and stability for closed loop system having characteristic equation as

S5+S4+4S3+4S2+4S+4=0

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 25
R – H criteria

S3 row turns out to be zero

Forming auxiliary equation A (S) = 0 = S4 + 4S2 + 4

dA(s)/ds = 4S3 + 8S

Again S1 row turns out to be zero

Forming auxiliary equation & differentiating it we get S1 row term

A’1 (s) = 2S2 + 4

A’1 (s) = 4s

For frequency of oscillations

S4 + 4S2 + 4 = 0

(S2 + 2)2 = 0

S1, S2 = ±j2 =S3, S4

multiple roots on jw axis so system is unstable

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 26

The value of the current measured by the ammeter in figure is

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 26
4i2 + 6i3 - 2i1 = 0

i1 + i2 = 2

i2 = 5 + i3

i1 = - 5 / 6 A

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 27

Z-Transform of a signal x[n] is given as

X(z) = 4/z2-25,|z|<5 The Z-Transform of y[n] = nx[n] is given as

(Az2)/(z2-25)B then find the value of 'A+B'.

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 27
We have from properties of Z-Transform,

If, y[n] = n.x[n]

⇒Y(z)

= 8z2/(z2 - 25)2

Thus, A = 8,B = 2

A + B = 10

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 28

In the following circuit, the switch S is closed at t = 0. The rate of change of current di / dt (D+) is given by

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 28

Initially i (0-) = 0. Due to inductor, i (0+) = 0. Thus, all current Is will flow in resistor Rs and voltage across inductor will be,

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 29

If y(t) is the Hilbert Transform of x(t) = sinc(2t), where sin c(x) = sin(πx)/πx

Then find the value of

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 29
We have,

By duality principle,

Hence, we have,

since, y(t) is the Hilbert Transform ofx(t), thus,

Drawing the spectrum of Y(f)

By Parseval's relation we have,

Thus, from the spectrum we can find,

Thus, the required value is 0.5

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 30

vector field is given by E = 4zy2ux + 2y sin 2xuy + y2 sin 2xuz. The surface on which Ey = 0 is

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 30
For Ey = 0, 2y sin 2x = 0

y = 0

sin 2x = 0

2x = 0, π, 3π

x = 0, 3π / 2

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 31

Find the value of the integral of f(x) = log10x from 5 to 11 by Simpson’s 1/3rd rule taking number of intervals, n = 6.

[Write the answer upto two decimal point]

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 31
We

abf(x)dx have,

h = (11−5)/6 = 1

We know that, by Simpson's 1/3 rd rule,

abf(x)dx

= h/3[s0+4s1+2s2]

Here, h = 1,a = 5,b = 11

s0 = f(x0) + f(x6) = 1.74

s1 = f(x1) + f(x3) + f(x5) = 2.681

s2 = f(x2) + f(x4) = 1.799

511log10⁡xdx

= 1/3(1.74 + 10.724 + 3.598)

= 5.354

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 7 - Question 32

he aerial current of an AM transmitter is 18 A when unmodulated but increases to 20 A when modulated.

The modulation index is _____. (Answer up to two decimal places)


Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 32
It = 20 A

Ic = 18 A (when unmodulated)

So, AM relation between It and Ic is given as:

So, m = 0.68

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 33

Steady state error constants of a system depends on:

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 33
The error constant in a system always depends on steady state response of the system;
*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 7 - Question 34

A dice is thrown thrice. Getting 1 or 6 is taken as a success. The mean of the number of successes is (Answer to the nearest integer)


Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 34
Success probability, p = 2/6 = 1/3

As the dice is thrown thrice, n = 3.

Thus, for binomial distribution,

Mean = (np) = 1/3 x 3 = 1

[Note: Variance σ2 = npq]

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 35

Diffusion constant (Dn) and mobility constant (μn) of an electron are related as follows

Dnn = KxTyqz

Where x, y, z are constants and ‘K’ is Boltzmann constant, ‘T’ is temperature, ‘q’ is charge of an electron.

Find the value of x+y+z.

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 35
We have, by Einstein’s Relation

Dnn = KT/q

Thus, x = 1,y = 1,z = -1

X + Y + Z = 1

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 7 - Question 36

The ac schematic of an NMOS common-source stage is shown in the figure below, where part of the biasing circuits has been omitted for simplicity. For the n-channel MOSFET M, the Transconductance gm = 1mA/V, and body effect and channel length modulation effect are to be neglected. The lower cutoff frequency in Hz of the circuit is approximately at (Answer to the nearest integer)


Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 36

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 37

The drain of an n− channel MOSFET is shorted to the gate so that VDS = VGS. The threshold voltage (VT) of MOSFET is 1 V. If the drain current (ID) is 1 mA for VGS = 2V, then for VGS = 3V, ID is:

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 37
We know that,

For an n−channel MOSFET, the current in triode and saturation region is given by:

ID = Kn[2 VDS(VGS − Vth) − VDS2)] when VDS < VGS − Vth

ID = Kn(VGS − Vth)2 when VDS > VGS − Vth

VDS = Drain to Source Voltage

VGS = Gate to source voltage

Vth = Threshold Voltage

Kn = Conduction parameter

Now,

For the given circuit, the drain and gate terminals are shorted, i.e. VDS = VGS

Since VDS > VGS − VT, the device is in saturation.

When VDD = 2V then VGS = VDS = 2 V

From the current equation:

1 mA = Kn(VGS − VT)2

⇒ 1 mA = Kn(2 − 1)2

⇒ Kn = 1 mA/v2

When VDD = 3V then VGS = 3 V

ID = Kn(VGS − VT)2

=1×(3 − 1)2 mA

= 4 mA

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 38

dxdydz is equal to

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 38

= (e - 1) (e - 1) (e - 1)

= (e - 1)3

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 39

In the amplifier circuit shown in figure, the MOSFET has I = 6mA,VP = -3Vand rd = 30kΩ . The voltage gain and Ri of the amplifier respectively are

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 39
DC analysis

KVL for G-S loop

0 − IC(10M) − VCS − 2.5m × 1k = 0

⇒VCS = −2.5V(∵IC = 0in MOSFET)

AC analysis:

The given circuit is a CS amplifier. So small signal model

AV = −gm(RD ∥ rd)

= −0.666m[3k ∥ 30k]

= −1.8185

Also Ri = 10 MΩ

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 40

In a non-magnetic medium ( ∊r= 6.25), the magnetic field of an EM wave is H = 6 cos β × cos (108 t) us A/m. The corresponding electric field is

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 40

= 903 sin (0.83x) sin (108t)uy V/m

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 41

Assuming both the voltage sources are in phase, the value of R for which maximum power is transferred from circuit A to circuit B is

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 41
Current through R will be

i = (10 − 3)/(2+R)

=(7/2+R)A

Current through 3 V source is

i1 = i − (3/−j1)

= i − 3j

So power delivered to circuit B by circuit A is

P = i2R + i1 × 3

P = (7/(2 + R))2R + (7/(2 + R) − 3j)3

for P to be maximum ∂P^/∂R will be aero ∂P/∂R=0

49(2 + R) - 98R - 21(2 + R) = 0

98 + 42 = 49R + 21R

R = 56/70 = 0.8Ω

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 42

Consider the following advantages with respect to HVDC transmission:

  1. Long distance transmission

  2. Low cost of transmission

  3. Higher efficiency

Which of the above advantages are correct?

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 42
Advantages of HVDC systems:
  1. Economical for long distance bulk power transmission by overhead lines

  2. Greater power per conductor and simpler line construction

  3. No skin effect

  4. No reactive compensation is required

  5. Higher operating voltage is possible

  6. No stability problem

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 43

As x is increased from –∞ to ∞, the function

f(x) = ex /1 + ex

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 43

∵ for all x , f(x) is positive

So x →∞, functions value increases

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 7 - Question 44

It was found that a sampling rate 20% above the rate would be adequate. So, the maximum SNR (in dB) that can be realised without increasing the transmission bandwidth would be _________. (Answer up to one decimal place)


Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 44
Nyquist Rate = 2 MHz

50% higher rate = 3 MHz, L = 256 = 28

Thus, transmission bandwidth is 3 MHz × 8 = 24 Mbits/s.

New sampling rate is at 20% above the Nyquist rate.

Sampling rate = 1.2 × 2 = 2.4 MHz.

Level = 210 = 1024

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 45

The magnitudes of the open-circuit and short-circuit input impedances of a transmission line are 100Ω and 25Ωrespectively. The characteristic impedance of the line is,

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 45
The characteristic impedance or surge impedance (usually written Z0) of a uniform transmission line is the ratio of the amplitudes of voltage and current of a single wave propagating along the line; that is, a wave travelling in one direction in the absence of reflections in the other direction.

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 7 - Question 46

The divergence of the vector is (Answer up to the nearest integer)


Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 46

= 1 + 1 + 1 = 3

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 47

Find the minimum channel bandwidth ( in kHz) required to transmit an 8-ary PSK signal with each bit duration of 15.6μs.

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 47
We have, bit rate,

Rb = 1/Tb = 1/15.6×10-6 = 64.1kbps

Now, channel bandwidth required for M-array PSK is B = 2Rb/log2M

Minimum Channel bandwidth required for an M-PSK is Rb/log2M

Here, M = 8

⇒ B = 64.1k/log28 = 21.4kHz

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 48

Consider the system shown below.

Find the sensitivity Seαof the given system.

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 48
The equivalent forward transfer function

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 49

The response of a system to a unit impulse input is given by

y(t) = te-3t

which of the following statement is correct about the system

  1. System is a linear system

  2. Steady state gain of the system for unit step input is 0.11

  3. Close loop system with unity feedback is stable

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 49
The given system is a non-linear system. The steady state gain for unit step input

Close loop system with unity feedback having characteristic equation [1/(s+3)2 ]+ 1 = 0 = s2 + 6s + 10

∴ Roots = −3 ± 1

Hence. Stable system.

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 50

The frequency response H (jω) of a continuous-time filter is shown below.

If the input to this system is x (t) = cos (2πt + θ),, the output will be

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 50

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 51

What will be the arithmetic result of A+A?

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 51
In binary addition of alphabets, we see that A + A will always result in A.

For Example:

If A=1, then A + A = 1=A

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 52

Consider the following 8085 assembly program:

MVI A, DATA1

MOV B, A

SUI 51 H

JC DLT

MOV A, B

SUI 82 H

JC DSPLY

DLT : XRA A

OUT PORT1

HLT

DSPLY : MOV A, B

OUT PORT2

HLT

The program will display

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 52

If DATA is less than 51H, SUI 51H will set the CY flag and execution will jump on DLP. After this A will be cleared and output at PORT1 will be 00. If DATA1 is greater than 51H and less than or equal to 82H, execution will jump on DSPLY and DATA1 will be displayed at PORT2.

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 53

In an NMOS circuit, Vt = 4 V and VGS ranges from 7.5 to 10 V. The channel to be continuous, finds the largest value of VDS?

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 53
From the NMOS circuit, it seen that when VGS > Vt, than VGS, channel is always present. In this, to make the channel open at drain, we should have VDS < VGS - Vt.

For VDS to be max, it should have 7.5 - 4 = 3.5 V

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 54

The counter shown in figure below is a

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 54
It is a down counter because 0 state of previous FF change the state of next FFT You may trace the following sequence, let initial state be 0 0 0

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 55

A curve given by x2 + y2 = 36 is revolved around the x-axis. The volume of solid generated is ..........π?

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 55

Volume generated = V = ∫6−6πy2dx

⇒ V = 2π∫60(36 − x2)dx

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 7 - Question 56

Consider the ideal op - amp circuit shown below.

If it is given that R2 / R1 = 10. R4 / R3 = 10.the common mode rejection ratio (CMRR) is _______. (Answer up to one decimal place)


Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 56

By solving the circuit , output voltage v0 is given as

(i)

Difference mode input voltage is

V0 = v1 - v2 ……..(ii)

Common mode input voltage is

vcm = (v1 + v2)/2 ……(iii)

Combining equation (ii) and (iii)

Differences mode gain Ad = 10.042

Common - mode gain Acm = 0.0833

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 57

If x(z) is z-transform of x(n) = (4)-nu(-n - 1) - (0.5)-n u(n) then ROC of X(z) will be

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 57
x(n) = (4)−n u(−n − 1) − (0.5)−n u(n)

x(n) = (1/4)nu(n−1)−(2)nu(n)

ROC for(1/4)nu(−n+) will be |z|<1/4

And ROC for (2)nu(n) will be |z|>2

So, No common ROC of Z-transform does not exists.

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 7 - Question 58

A 2.4 cm x 1.5 cm wave guide operates in TE10 mode at 9 GHz. The guide is made of brass (σc = 1.1 x 107s/m) and filled with teflon (∈r = 2.6,σd = 10-15 s/m) .

The attenuation constant, due to conduction losses, α0 is _____. (Answer up to three decimal place)


Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 58

For TE10 mode

= 0.0568

= 0.022

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 59

The DTFT of a sequence x = , otherwise is x(e). Then find the value of x(e)

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 59
x(n) = {−3,−2,−1,0,1,2,3}

x(ejw) = −3e3jw − 2e2jw− ejw + 0.ejw + e−jw + 2e−2jw + 3e−3jw

x(ej0) = −3 − 2 − 1 + 1 + 2 + 3 = 0

x(e) = 3 − 2 + 1 − 1 + 2 − 3 = 0

*Answer can only contain numeric values
GATE Mock Test Electronics Engineering (ECE)- 7 - Question 60

Consider the system shown below. The average value of m (t) is zero and maximum value of |m (t)| is M. The square law device is defined by y (t) = 4x (t) + 10x (t).

The value of M, required to produce modulation index of 0.8, is ______. (Answer up to two decimal places)


Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 60

The AM signal is ,

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 61

The waveform of a periodic signal x(t) is shown in the figure.

A signal g(t) is defined by g(t) = x[(t - 1)/2]. The average power of g(t) is __________.

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 61
x(t-1)/2

And T = 6

Average Power

= 2

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 62

In n - type silicon MOS structure a metal semi conductor work function difference of фms = - 0.35 V is required. If gate is n+ polysilicon, the required silicon doping is

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 62

For n+ polysilicon gate

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 63

For half-wave rectifier, the value of the direct current is given by x.Im , where Im is the peak to peak value of the input. Find the value of x?

[Write the answer up to two decimal point]

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 63
For Half wave rectifier we have, l0 is the peak value.

Ide = I0/π = 1/π(Im/2) = 1/2π.Im

Thus, x = 1/2π = 0.16

GATE Mock Test Electronics Engineering (ECE)- 7 - Question 64

Directions: Consider the following figure

The current in the 1Ω resistor in Amps is (Answer up to the nearest integer)


Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 64
we can use principle of superposition to determine the current across 1 ohm resistance.
GATE Mock Test Electronics Engineering (ECE)- 7 - Question 65

Who proposed the idea of transmission of light via dielectric waveguide structure?

Detailed Solution for GATE Mock Test Electronics Engineering (ECE)- 7 - Question 65
It was in the beginning of 20th century where Hondros and Debye theoretical and experimental study demonstrated that information can be transferred as a form of light through a dielectric waveguide.
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