In a continuous time system x(t) and y(t) denotes the input and output respectively then which of the following corresponds to a casual system?
is casual if the y(I) at any the
depends only on presarit of past or both
present and past values of xit).
So, here y(t) = + 4) x(t -1) is only a casual system.
If f(x) = , for Fourier series of x(t) in the interval (-π, π), the value of ao and a1 respectively is
Since, is an even function_
So.
=
and
= 0
The fundamental period of signal
Here,
So, fundamental period
= 0
The Laplace transform of a continuous-time signal x(t) is
If the Fourier transform of this signal exists, then x(t) is
If the Fourier transform of the signal exiss, then ROC must be-2 < Re(s) < 3. Therefore, x(t) e 2t u(t) — 2e31 u(-t).
The ROC for the Laplace transform of signal
x(t) = e-2t {u(t) — u(t — 5)] is given by
∴
for, Re(s) > -2
Under what condition the energy of signal g1(t) and g2(t) equals to E91 + Eg2
The signal V(t) = cos 5 πt + 0.5 cos 10 πt,is instantaneously sampled. The interval between the samples is 'TS'. Then the maximum allowable value for 'Ts' is
(c)
Frequencies in the given signals are 2 πf = 5 π and 2 πf = 10 π i.e. 2.5 Hz and 5 Hz.
∴. Sampling frequency
= fs
= 2 fm
= 10 Hz
⇒
Inverse Laplace transform of
Solving by use of partial fraction;
We get, A = 2,
B = 1
and and C = --1
∴ f(t) Inverse laplace of F(s)
f(t) = δ(t) + 2 + t - e-t
Match List-I (Type of Addressing Modes)
with List-II (Instructions set) and select the correct answer using the codes given below the lists:
List-I
Implicit addressing mode
Direct addressing mode
Register indirect mode
Register addressing mode
List-II
MOV A, M
MOV A, B
CMA
STA 2700H
Codes:
Consider the following statements:
PSW = Accumulator Flag Registor only
and SP operates as LIFO (Last in First out).
In priority orders, the interrupts in microprocessor are as
In priority order, interrupts are as,
TRAP > RST7 .5 > RST6_5 HST5.5> INTR.
A memory chip of size 4 k byte has starting location 2000H. The last location of memory chip is given by
Total number of memory locations
= 22 x 210
212
Since in itia memory location
The 8085 assembly language instruction that stores the content of H and L register into the memory locations 2050H and 2051H, respectively is
The following program is run on an 8085 microprocessor:
Memory Address Instruction
(in hex)
3000 LXI SP, 4000
3003 PUSH H
3004 PUSH D
3005 CALL 3050
3008 POP H
3009 HLT
At the completion of execution of the program, the program counter of 8085 and stack pointer contains
(c)
3000 SP → 4 4000
3003 SP → SP decremented by 2 i_e_ 3FFE
3004 SP → SP decremented by 2 3FFC
3005 PC → 3050
SP → 3FFC
PC → 3050
15 8 memory chips of 64 x 4 bit size have address buses connected together. The resultant memory is
Use Code STAYHOME200 and get INR 200 additional OFF
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