GATE  >  GATE Electrical Engineering (EE) 2023 Mock Test Series  >  Gate Mock Test: Electrical Engineering(EE)- 14 Download as PDF

Gate Mock Test: Electrical Engineering(EE)- 14


Test Description

65 Questions MCQ Test GATE Electrical Engineering (EE) 2023 Mock Test Series | Gate Mock Test: Electrical Engineering(EE)- 14

Gate Mock Test: Electrical Engineering(EE)- 14 for GATE 2022 is part of GATE Electrical Engineering (EE) 2023 Mock Test Series preparation. The Gate Mock Test: Electrical Engineering(EE)- 14 questions and answers have been prepared according to the GATE exam syllabus.The Gate Mock Test: Electrical Engineering(EE)- 14 MCQs are made for GATE 2022 Exam. Find important definitions, questions, notes, meanings, examples, exercises, MCQs and online tests for Gate Mock Test: Electrical Engineering(EE)- 14 below.
Solutions of Gate Mock Test: Electrical Engineering(EE)- 14 questions in English are available as part of our GATE Electrical Engineering (EE) 2023 Mock Test Series for GATE & Gate Mock Test: Electrical Engineering(EE)- 14 solutions in Hindi for GATE Electrical Engineering (EE) 2023 Mock Test Series course. Download more important topics, notes, lectures and mock test series for GATE Exam by signing up for free. Attempt Gate Mock Test: Electrical Engineering(EE)- 14 | 65 questions in 180 minutes | Mock test for GATE preparation | Free important questions MCQ to study GATE Electrical Engineering (EE) 2023 Mock Test Series for GATE Exam | Download free PDF with solutions
1 Crore+ students have signed up on EduRev. Have you?
Gate Mock Test: Electrical Engineering(EE)- 14 - Question 1

Given 4 words labelled as (P), (Q), (R) and (S). One of the pairs given below has words which have similar meaning or have opposite meaning. Identify the correct option.

(P) instigate (Q) enquire

(R) construe (S) interpret

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 1 Construe and interpret have identical meaning (a word or action).

Thus, option C is the correct answer.

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 2

A job can be completed by 12 men in 12 days. How many extra days will be needed to complete the remaining job, if 6 men leave after working for 6 days?

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 2 work done by one man in 1 day

=1 / 12×12 Work done by 12 men in 6 days = 1/2 Remaining work = 1−(1/2) = 1/2 After 6 men leave the work, time taken to complete the remaining work = Remaining Work/Remaining Men

∴ Time taken

= 12 × 12 / 6 × 2 =12days

So,

so the extra time taken =12 - 6 = 6 days

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 3

Which of the following phrases should be placed in the blank spaces so as to make a grammatically correct and meaningful sentence.

Even though the institute had lot of space.______

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 3 Answer b would be a grammatically correct sentence.
Gate Mock Test: Electrical Engineering(EE)- 14 - Question 4

In the question, there are 4 statements followed by 4 conclusions numbered as (a), (b), (c) and (d), assume the given statements to be true even if they are at variance with commonly known facts, identify the conclusion which following from the given 3 statements

S1: Some guitars are posters.

S2: All posters are doors.

S3: Some doors are tablets.

S4: All tablets are books

Conclusions:

C1: Some doors are guitars.

C2: Some books are posters.

C3: Some tablets are guitars.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 4 S1 is ‘particular affirmative’ type of statement whereas S2 is a universal affirmative. S1 & S2 combined lead to ‘particular affirmative’ i.e. some guitars are doors ‘and’ some doors are guitars’ i.e. C3 is not possible. C2 is also NOT possible since no conclusion is possible regarding books and posters; hence only C1 following leading to option (a).
Gate Mock Test: Electrical Engineering(EE)- 14 - Question 5

Choose one word out of the given option to replace the phrase ‘person who insists on adherence to formal rules of the literal meaning’.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 5 Pedant is a person who strictly goes by the rule of the book of the literal meaning of the written text.

Thus, option A is the correct answer.

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 6

A shopkeeper gives a discount on the marked price based on the quantity bought by a customer. Raja bought 10 pieces of a lunch box and was given a 10% discount by the shopkeeper. When Radhika bought 20 pieces of the same lunch box, she was given a 15% discount by the shopkeeper. In both the cases, the net amount of profit for the shopkeeper was identical. Which of the following is the ratio of marked price to the cost price for the lunch box?

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 6

Let 'M' and 'C' be the marked price and cost price per lunch box. We can form an equation based on the given information as

i.e.

i.e. C = 8M / 10

or M:C = 10:8 or 5: 4

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 7

It would take one machine 4 hours to complete a production order and another machine 2 hours to complete the same order. If both machines work simultaneously at their respective constant rates, the time taken to complete the same order is __________ hours.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 7

Let t be the time taken by the machines when they work simultaneously.

∴ 1 / t = 1 / 4 + ½

∴ 1 / t = 3 / 4

∴ t = 4 / 3

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 8

Which of the options given below should replace the part of the sentence written in BOLD so as to get a meaningful and grammatically correct sentence?

We had not only helped them with money but also with new machinery and raw material.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 8

Answer C is corrected as not only will come after the sentence.

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 9

A fair die is thrown three times and the sum of three numbers is found to be 16. Find the probability that 5 appears on the third throw.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 9

For sum = 16, we have the following cases:

(i) 6, 6, 4

(ii) 6, 4, 6

(iii) 4, 6, 6

(iv) 5, 5, 6

(v) 5, 6, 5

(vi) 6, 5, 5

Total cases of sum (16) = 6

Favourable cases for 5 appears in 3rd throw = 2

p = 2 / 6 = 1 / 3

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 10

A work of classics is split up in 3 volumes-each volume having equal number of pages. It is also known that the page numbers are running across the 3 volumes. If the sum of the first page number of the 3 volumes is 1473, the number printed on the first page of volume 3 is ________.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 10

Let the number of pages in each volume be ′x′. The first page of the 3 volumes will be 1,1+x and 1+2x respectively. 1473 = 1 + (1 + x) + (1 + 2x) = 3 + 3xgiving

x = 1470/3 = 490

First page of volume 3 will be having pages starting from 1 + 980 = 981

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 11

Find the value of the resistance and the inductance of the branch CD if the balance is obtained under these conditions. if the arms of an ac. maxwell bridge are given as: AB is a non-inductive resistance of 1000 Ω in parallel with a capacitor of capacitance 0.5 μF, BC is a non inductive resistance of 600Ω and CD is an inductive impedance which is unknown and DA is a non-inductive resistance of 400 Ω?

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 11 The balanced condition is

R1R3 = R2R4

R3 = R2R4/R1

R3 = 600 × 400/1000 = 240Ω

L3 = CR2R4

L3 = 0.5 × 10−6 × 400 × 600

L3 = 12 × 10−2

L3 = 0.122H

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 12

A single phase semi converter is operated from 120V, 50Hz ac supply. The load current with an average value IDC is continuous and ripple free firing angle α=π/6. Determine the harmonic factor of input current?

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 12 Supply rms current

= 0.91Idc

Now the rms value of supply fundamental component of input current

Harmonic factor (HF) of input current

=

=

= 0.30

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 13

A 200V dc series motor develops its rated output at 1500 rpm while taking 20 A . Armature and series field resistances are 0.6Ω and 0.4Ω respectively. To obtain rated torque at 1000 rpm, external resistance must be added is

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 13

⊤ ∝ la2 ⇒ T = kla2

For const torque armature I must be const.

Eb = 200 − 20 × (0.6 + 0.4) = 180V

la = 20A for 1000rpm. Ea = kϕw

180Ea = 1500 / 1000

Ea = 120V = 200 − 20(0.4 + 0.6 + Rext)

⇒ Rext = 200 − 120 / 20 −1 = 3Ω

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 14

The value of impedance of short transmission line having supply of 6.5 kV with the rating of 10 kVA is (1+j5) p.u. What is the impedance at the new base of 13 kV and 30kVA?

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 14 As we know that by the formula that

So

= 0.75 + j3.75

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 15

A Signal x(t) has Fourier transform x(ω) phase and magnitude of x(ω) are shown below

Determine x(t) at t = 5sec

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 15

=

x(5) = 0.5

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 16

A 3-ɸ bridge converter is provided with line-line voltage of 400 V. A load which is resistive in nature of value 100 ohm takes 400 W of power from the converter, the input power factor will be

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 16

Load current

In A 3ϕ fully enthralled bridge inverter input rms current I or the

correct in each supply phase exist for 120∘ in every 180∘

Therefore rms value of input current

Input apparent power

= √3 × VSIS

= √3 × 400 × 1.15

= 796.72vA

∴ Input apparent power = Output power

796.72cosθ = 400

cos⁡θ = 0.5 lagging

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 17

The z-parameters of the network shown in figure are given by

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 17

z11 = v1I1∣∣t2 = 0 (Open circuit output terminal)

z11 = v1I1∣∣t2 = 0 (Open circuit output terminal)

V1 = I1R1

z11 = V1I1 = R1

z11 = v2I1∣∣I2 = 0

V2 =−αV1

V2 = −α(I1R1)

z21 = V2I1 = −αR1

z12 = v1I2∣∣I1 = 0 (Open circuit input terminal)

Since V1 = I1R1 = 0

50,Z12 = 0

z22=V2I2∣∣I1 = 0

since V1 = I1R1 = 0

Thus, α∨1 = 0

V2 = I2R2

z22 = V2I2 = R2

Alternative Method:

We have the equations for voltage V1 and V2 as

∨1 = |1R1

V2 − I2R2 + αV1=O

V2 = I2R2−αV1

From eq. (1) V2 = I2R2 − α(1R1) = (−αR1)I1 + R2I2

Comparing equation (1) and (2) to the general equation of z- parameter,

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 18

The admittance parameter matrix [y] is

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 18

(Node equation at the top left node)

(Node equation at the top right node)

Comparing equation (1) and (2) with general equations, we get z-

parameters as

[y] =

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 19

Geneticists say that they are very close to confirming the genetic roots of psychiatric illnesses such as depression and schizophrenia, and consequently, that doctors will be able to eradicate these diseases through early identification and gene therapy. On which of the following assumptions does the statement above rely?

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 19
  1. A says that strategies are now available for eliminating psychiatric illnesses but it is mentioned in the very first line that the geneticists are very close but the strategy is not available till now. So, A is incorrect.

  2. The given data says that the geneticists are working on the genetic roots of psychiatric illnesses such as depression and schizophrenia, which implies that these two diseases have genetic basis. Thus, B is the correct option.

  3. C says that all human diseases can be traced back to genes and how they are expressed, but the data given in the question talks about psychiatric illnesses such as depression and schizophrenia only. So, C is also incorrect.

  4. D says that in future, genetics will be the only relevant field for identifying psychiatric illnesses, which cannot be inferred from the given data. So, D is also incorrect.

So, B is the correct option

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 20

Determine the maximum drain current in mA for the JFET in the given network, if VGS = −3V and Vp = −8V

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 20

Considering input loop, since, IG = 0A and IS = ID

VGS = −IDRS

Since,

Substituting values,

⇒ 2.5mA =

⇒ 2.5mA=IDSS(2564)

⇒ IDSS = 64/25 × 2.5mA

⇒ IDSS = 6.4mA

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 21

An ac voltmeter uses half wave rectifier and the basic meter with full scale deflection current of 1 mA and the meter resistance of 200 Ω. Calculate the multiplier resistance for a 10 V r.m.s range on the voltmeter.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 21

the meter uses half wave rectifier and input is 10 V r.m.s

Eav = 1/2 (Eav over a cycle of input)

Now Ep = √2 Erms = 14.14V

Eav = 0.6 Ep = 8.99 ≈ 9V

Therefore, Eav (output) = 1/29 = 4.5V

Edc = 0.45Erms

Rs = Edc/ldc − Rm = 0.45Erms/ldc − Rm = 0.45×10/1×10−3 − 200

Rs = 4.3KΩ

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 22

Let f(x) = x(x - 1)(x - 2) be defined in [0,0.5]. Then the value of c of the mean value theorem is

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 22

f(x) = x3 − 3x2 + 2x

f′(x) = 3x2 − 6x + 2

f′(c) = 3c2 − 6c + 2

by mean value through, we have

∴ 3c2 − 6c + 2 = 3/4

12c2 − 24c + 5=0

c = 6 ± √21/6

C = 6 − √21/6 = 0.24↔(0, 1/2)

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 23

For the flip flop configuration shown below, find the operation carried out by this configuration.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 23

Stages

It is a gray counter.

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 24

If Laplace transform of a function is given by

Find the value of f(0+) and f(∞) respectively.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 24

Initial value = 2

Final value = 6/8 = ¾

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 25

A 70 MW steam station uses coal of calorific value 5000 Kcal/kg. Thermal efficiency of the station is 40% and electrical efficiency 70 % . calculate the coal consumption per hour when the station is delivering its fuel rated output is ___x 103 kg?

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 25

Given data

Overall efficiency of the power station is n overall =ηthermal ×nelectrical

= 0.4 × 0.7 = 0.28

Units generated /hr = (70×103)×1

= 70kwh

Heat produced / hr

H= electrical output in heat units /n overall

= 70 × 103 × 860/0.28 = 215 × 106Kcal(1kwh = 860Kcal)

Coal consumption 1hr=H/ calorific value

= 215 × 106/5000

= 43 × 103kg

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 26

The value of is ____

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 26

=

Putting

= -0.94

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 27

Consider two real valued signals, x(t) band-limited to [−500 Hz, 500Hz] and y(t) bandlimited to [−1kHz, 1kHz]. For z (t) = x(t). y(t), the Nyquist sampling frequency (in kHz) is __________

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 27 x(t ) is band limited to [−500Hz, 500Hz] y(t )is band limited to [−1000Hz, 1000Hz] z(t ) = x (t ).y(t )

Multiplication in the time domain results in convolution in the frequency domain.

The range of convolution in frequency domain is [−1500Hz, 1500Hz]

So, the maximum frequency present in z(t) is 1500Hz Nyquist rate is 3000Hz or 3 kHz.

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 28

Keeping the kW demand constant if the load power factor increases the kVA demand –

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 28

kW = kVA cosϕ

Kva ∝ 1/cos⁡ϕ

If the power factor increases the kVA demand will decrease.

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 29

A delayed unit step function as

Its Laplace Transform is

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 29

=

=

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 30

Find the inverse Laplace transform of the function F(s) =

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 30

let G(s) = 2/(s + c)

⇒ g(t) = L−1{G(s)} = 2e−ct

f(t) = L−1{G(s) e−bs}

=2e− k(t − b)u(t − b)

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 31

A discrete time signal with input as x[n] has impulse response h[n]=kδ[n] where k is constant. The output y[n] of the system is given as:

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 31

For a discrete time signal with input as x[n] has impulse response h[n] =kδ[n], the output y[n] of the system is given as:

y[n] = x[n] × h[n]

y[n] = x[n] ×kδ[n]

y[n] = k(x × δ)[n]

y[n] = kx[n]

Taking Fourier transform on both sides

Y(ω) = X(ω) x H(ω)

Therefore H(ω) = Y(ω)/X(ω)

This is known as the transfer function of the system.

h[n] = F-1[H(ω)].

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 32

The Potential (scalar) distribution in free space is given as V=10y4+20x3. if ε0 is permittivity of free space then the charge density ρ at the point (2,0) is

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 32

Here, we have to use Poisson's Equation,

, because

20 × 3 × 2x + 10 × 4 × 3y2 = −ρ/ε

At point (2,0)f

ρ = −240ε0

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 33

A 4-pole, 50Hz, 100MVA turbo generator has a moment of inertia 9.5 x 103 kg-m2. What is the kinetic energy stored in the machine?

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 33

N = = 1500rpm

I = 9.5 x 103 kg-m2

K.E. = = 117.2MJ

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 34

Determine the reciprocity and symmetry of the given two-port network.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 34

The loop equations are:

V1 = 3I1 + 5(I1 + I2) = 8I1 + 5I2

V2 = 4I2 + 5(I1 + I2) = 5I1 + 9I2

When I2 = 0,

Z11 = V1I1 = 8

Z21 = V2I1 = 5 When I1 = 0,

Z12 = V1I2=5

Z22 = V2/I2 = 9

Since Z11 ≠ Z22, the network is not symmetrical. But, Z12 = Z21, so the network is reciprocal.

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 35

If ω is the frequency of the 3-phase source supplying to a 3-phase full-wave bridge rectifier, what is the fundamental frequency of the output voltage?

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 35 In a 3-phase full-wave bridge rectifier, there are six combinations of line-to-line voltages, taking 2 phases at a time. If the period of the source is 360 °, then the transition will take place every 360/6 = 60 °. Hence, there will be six transitions that will occur for each period of the source voltage.

Thus, the fundamental frequency of the output voltage is 6ω.

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 36

Find the complete solution of the state equation given below

Given the initial condition as

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 36

Consider the state equation be, X˙= AX + BU Where,

We know that,

Finding

=

=

State transition matrix

=

Now,

And

=

=

=

Thus,

=

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 37

In a 3-phase line operating at 50 Hz, the conductors, each of 0.96 cm diameter, are arranged as given below.

Determine the inductance of the line.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 37

Radius of the conductor = 0.96 / 2 x 100 = 0.0048m

Mutual GMD (geometric mean distance) of the conductor = = 2.296m

= 1.234 x 10-6H/m

= 1.234 mH/km

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 38

The divide by N counter is shown below. If initially Q0 = 0, Q1 = 1, Q2 = 0 the value of N is _______.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 38

State is repeating after 5 clock pulses. N = 5

*Answer can only contain numeric values
Gate Mock Test: Electrical Engineering(EE)- 14 - Question 39

Find the difference between rank of A and columns of null space of A?

A =


Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 39

We need to find the REF form of the matrix to find null space of the matrix

REF =

Clearly it has 3 pivot columns

Thus we have

Rank = 3

Column in null space = 2 = free variable in matrix.

Difference = 3 - 2 = 1

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 40

If an electric field is given as:

And,

Determine the work (in nJ) that is to be done in moving a 3μC charge along this path if the path is located at P(-0.3, -4, 0.6).


Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 40

Here, length and work is differential in nature, and hence, no integration is required. (Differential because charge is moved through ΔL ).

Therefore,

=

Now it is given that Q = 3 × 10−6

So, we get:

Now, we have point P = (−0.3, −4,0.6)

x = −0.3, y = −4 and z = 0.6

Therefore,

= 4.89 x 10-10J

= 0.489 nJ

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 41

DC shunt motor is coupled to the identical DC shunt generator. The field of the generator is also connected to the same supply source as the motor. The armature resistance is 0.02 pu and the mechanical losses are 0.05 pu. Armature reactions can be neglected. The armature of the generator is connected to a load resistance RL. With rated voltage across the motor, the load resistance across the generator is adjusted to obtain rated armature current in both motor and generator. The pu value of RL is

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 41

Motor is connected across rated voltage V = 1 pu

Rated armature current flaws in bath the motor and generator Im=Ig=1pu

Back emf in motor

Eb = V − ImRa = 1 − 1 × 0.02 = 0.98pu

Mechanical output power of motor

= EbIm -mechanicallasses

= 0.98 × 1 − 0.05 = 0.93 pu

This power is given to the generator.

Output power of generator = Output power of motor - mechanical Iasses

EgIg = 0.93 − 0.05 = 0.88pu ⇒ Eg = 0.88puTerminal voltage of generator

= Eg − lgRa = 0.88 − 0.02 = 0.86pu

Laad resistance

RL= V9/I9 = 0.86/1 = 0.86pu

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 42

Consider a 3-bit number A and 2 bit number B are given to a multiplier. The output of the multiplier is realized using AND gate and one bit full adders. If minimum number of AND gates required are X and one bit full adders required are Y, then X + Y =


Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 42

Number of AND gates required X = 6

Number of one bit full adders required Y = 3

X + Y = 6 + 3 = 9

X1, = X2

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 43

If z = sinh⁡ ucosv + icoshusinv then for what values of z, the function w = f(z) = u + iv is not analytic for

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 43

z=sinh⁡ ucosv+icoshusinv

By using hyperbolic properties cosh ⁡iv = cosv; sinh ⁡iv = isinv

z = sinh ⁡u cosh ⁡iv+cosh ⁡u sinh ⁡iv Now using sinh⁡(u+iv)=sinh⁡ u cosh ⁡iv+cosh ⁡u sinh ⁡iv we get

z = sinh⁡(u + iv)u + iv=sinh-1 zw = sinh-1 z

∴ z is not analytic for z2 = -1 ⇒ z = ±i

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 44

In the below parallel adder, A4 A3 A2 A1 is a BCD number and B4 B3 B2 B1 = 0011, then the circuit acts as

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 44

This binary adder simply adds 0011 i.e., 3 (in decimal) to a BCD number.

When 3 is added to the BCD then it becomes excess-3 code.

So, it is a BCD to excess-3 Code converter.

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 45

Let = αβγ = 1,α,β,γ ∈ R and X = Then MX=0 has infinitely many solutions if trace (M) is ……………………..


Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 45

MX = 0 has infinitely many solutions if |M| = 0 i.e., det(A) = 0

α(βγ - 1) - 1(γ - 1) + (1 - β) = 0

αβγ - α - γ + 1 + 1 - β = 0

αβγ - (α + β + γ) + 2 = 0

1 - (α + β + γ) + 2 = 0

(α + β + γ)=3

tr(M) = α + β + γ = 3

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 46

Compute the voltage gain for the following circuit with input frequency 2.5 KHz. [Mention the nearest Integer value in dB]


Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 46

= 3.9 ≈ 4db

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 47

In the half bridge rectifier as shown below, the peak current( in A) passing through the diode is ________ (If the supply input is given as Vs = 200Sin(100πt))


Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 47

We know that maximum value of A sincut + Bcos⁡ωt = √A2+B2

So, maximum value of diode current is

(tD)max = 2.09A

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 48

For a given connected network and for the fixed tree, fundamental loop matrix is given by

The cut set matrix corresponding to the same tree is

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 48

Relationship between tie-set matrix and cut-set matrix

[B] = tie-set matrix = [I:BT ]

[Q] = tie-set matrix = [Q_l:I]

Where [Ql ] = - [BT ]T

Relationship between tie-set matrix and cut-set

matrix [B] = tie-set matrix =[I:BT]

[Q]= tie-set matrix =[Q1:I]

Where [Ql ] = - [BT ]T

=

[Q] =

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 49

The three impedances Z1 = 20∠30⁰Ω, Z2 = 40∠60⁰Ω, Z3 = 10∠-90⁰Ω are delta-connected to a 400V, 3 – Ø system. Determine the phase current IR.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 49

Taking VRY = V∠0⁰ as a reference phasor, and assuming RYB phase sequence,

we have

VRY = 400∠0⁰V

Z1 = 20∠30⁰Ω = (17.32+j10)Ω IR = (400∠0o)/(20∠30o)=(17.32-j10) A.

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 50

Given . Find the value of ∮ on the closed path shown below.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 50

From Stokes theorem

=

=

=

=

=

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 51

The bus admittance matrix for a power system network is given by,

A new transmission line which is represented below is connected between bus 1 and 3.

The modified bus admittance matrix is

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 51

The new transmission line is connected between bus ( 1 ) and (3), so element has to be changed, are Y11,Y13, Y31, Y33

Similarly,

Modified bus admittance matrix.

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 52

A six-pole, 3−ϕ,50 Hz induction motor has a rotor resistance and rotor reactance of 0.02Ω and 0.13Ω respectively at standstill. The external resistance to be added in the rotor circuit to get 75% of maximum torque at starting is

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 52

sm =

sm =

sm = 0.453

sm = R/X = 0.453

R = 0.453 x 0.13

R = 0.058Ω

So, the external resistance to be connected to the rotor circuit would be

Rext = 0.058 x 0.02 = 0.038 Ω

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 53

Consider a discrete signal,

The value of will be


Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 53

Z-transform of signal will be

Putting z = 1

Z transform of signal x(n) will be:

Putting z = 1

= 2.75

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 54

The integral , where ′D′ denotes the disc x2 + y2 ≤ 4, evaluate to


Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 54

Let x = rcos⁡θ & y = rsin⁡θ

dxdy = rdrdθ

=

=

=

= 20

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 55

Consider the discrete time signals h[n] and its shifted form h[n−k].

The value of &


Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 55

h[k] = (1/2)k−1(u[k+3]−u[k−10])

So, h[k] is non zero only in range − 3 ≤ k ≤ 9

So, h[−k] is non zero only in range − 9 ≤ k ≤ 3

Shifting h[-k] by n, so

h[n − k] is non zero only in range, (n − 9) ≤ k ≤ (n + 3)

So,A = n − 9 and B = n + 3

S0,A − B= (n − 9) − (n + 3)

= −12

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 56

A unity negative feedback system is described by the following state model

The steady-state error of the system due to step input of strength ' 12′ is

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 56

The transfer function is given by =

Steady-state output is

e88 = input - output

e39 = 12 - 12 = 0

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 57

Consider the circuit shown in figure below:

Find the phase angle of current ‘I’ with respect to voltage V2.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 57

Equivalent voltage across terminal A-B is:

V = V1 + V2

V = 150(0.5 + j0.866) + 180(1 − j)

V = 255 − j50 = 259.85 < />

Impedance across the terminal A-B is

Current

Angle of voltage source V2 = 180√2 ∠ − 45

So, the angle current ' " and voltage V2 is =11.09.

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 58

Find Vx for which maximum power is transferred to load.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 58

Apply Thevenin’s theorem in load side

To supply maximum power,

VAB = 10/2 = 5V

By KCL at node A

Vx = 9.5 Volts

*Answer can only contain numeric values
Gate Mock Test: Electrical Engineering(EE)- 14 - Question 59

There are 3 fair coins and 1 false coin with tails on both sides. A coin is chosen at random and tossed 4 times. If ‘tails’ occurs all 4 times, then the probability that the false coin has been chosen for tossing is ___.


Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 59

Required Probability = Favorable Outcomes / Total possible outcomes

Favourable outcomes = A false coin is chosen and flipped every time Probability of selecting a false coin =1/4 Probability of getting a tail on every flip of false coin =1. Favourable outcome

= 1/4 × 1 = 1/4

Total possible outcomes = Favourable outcomes + Unfavorable outcomes Unfavorable outcomes = A fair coin is chosen and flipped every time to get tail Probability of selecting a fair coin = 3/4 Probability of flipping a fair coin 4 times and getting tails every time

= (1/2)4 = 116 ∴ Unfavourable outcomes

= 3/4 × 1/16 = 3/64

Total possible outcomes

= 1/4 + 3/64 = 19/64

∴ Required probability

=

= 16/19

= 0.84

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 60

Consider an asymptotic Bode plot of a minimum phase linear system as shown in the figure below. The transfer function for the above system will be

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 60

The initial line has slope of −40dB/decadel i.e., the transfer function of initial line is K/s2

At ω = ω1, the slope has been changed. From ω = ω1 to ω = 25, slope is −20dB/ decade

So,

−20 =

log⁡25 − log⁡ω1=0.8

log⁡ω1 = 0.597

ω1 = 3.95

According to the initial line.

M(dB) = 20log⁡K − 40log⁡ω

At ω = ω1M(dB) = 22

22 = 20log⁡K = 40×0.597

log⁡K = 2.294

K = 196.78

So, the transfer function is

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 61

The reading of the voltmeter (rms) in volts, for the circuit shown in the figure is _______

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 61

It is a Wheatstone bridge. For the bridge to be balanced, the required condition is

Z1Z4 = Z2Z3

From the given circuit, we have z1 = z4 = j1 − Ω

z2 = z3 = (1/j) − Ω

Now substituting these value for bridge balance equation

j×j = (1/j) × (1/j)

j2 = 1/j2

− 1 = −1

Hence, it is a balanced, Wheatstone bridge, and reading of voltmeter (rms) is

Vrms = Vm/(√2)

Vrms = 100/(1.414)

= 70.72v

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 62

Find the value of Ix in the given circuit.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 62

Let the source current is I, (current direction is outward from the source)

Ix = 310

Apply KVL in the loop

= 2.5√2∠105°A

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 63

Consider the signal . The time-period of the signal will be:

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 63

= 12

= 18

Condition for periodic function:

N1/N2 = 12/18 is rational number

Overall time-period, N = LCM of (12,18)

N = 36

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 64

If the maximum phase provided by the compensator is 30° and this is achieved at √6 rad/sec. The transfer function of the compensator is __________.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 64

Given, ϕm = 30

1/2 = 1−α/1+α

α = 13

Let assume the compensators transfer function is

Than maximum phase is provided at

So, the required compensators transfer function

Gate Mock Test: Electrical Engineering(EE)- 14 - Question 65

Find the value of A and B for signal, g(t) = Ay(Bt), such that y(t) = x(t) × h(t) and g(t) = x(3t) × h(3t)

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 14 - Question 65

We know that,

So,

=

Given form is,

=

So, we can write it as,

Comparing both equations, we get,

Taking Inverse Fourier Transform.

Comparing with given signal, g(t) = Ay(Bt)

A = 1/3 and B = 3

Use Code STAYHOME200 and get INR 200 additional OFF
Use Coupon Code
Information about Gate Mock Test: Electrical Engineering(EE)- 14 Page
In this test you can find the Exam questions for Gate Mock Test: Electrical Engineering(EE)- 14 solved & explained in the simplest way possible. Besides giving Questions and answers for Gate Mock Test: Electrical Engineering(EE)- 14, EduRev gives you an ample number of Online tests for practice