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Gate Mock Test: Electrical Engineering(EE)- 4


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65 Questions MCQ Test GATE Electrical Engineering (EE) 2023 Mock Test Series | Gate Mock Test: Electrical Engineering(EE)- 4

Gate Mock Test: Electrical Engineering(EE)- 4 for GATE 2022 is part of GATE Electrical Engineering (EE) 2023 Mock Test Series preparation. The Gate Mock Test: Electrical Engineering(EE)- 4 questions and answers have been prepared according to the GATE exam syllabus.The Gate Mock Test: Electrical Engineering(EE)- 4 MCQs are made for GATE 2022 Exam. Find important definitions, questions, notes, meanings, examples, exercises, MCQs and online tests for Gate Mock Test: Electrical Engineering(EE)- 4 below.
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Gate Mock Test: Electrical Engineering(EE)- 4 - Question 1

Choose the word or phrase which is nearest in meaning to the key word Lethargy

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 2

The following question comprise two words that have a certain relationship between them followed by four pairs of words. Select the pair that has same relationship as the original pair of words.
Break : Piece

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 3

Replace the phrase printed in bold to make it grammatically correct ?
"Even though many companies" are now penetrating rural India, it would help to give India a real chance of witnessing a double digit GDP growth.

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 4

Improve the sentence with suitable options by replacing the underlined word.

He is still in vigorous health although he is on the "right" side of sixty.

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 5
Complete the given sentence by choosing the correct phrase. 
You cannot succeed unless ________
Gate Mock Test: Electrical Engineering(EE)- 4 - Question 6
Chirag decided to give 12% of his salary to his younger brother as a pocket money. But he gave 1260 Rs which was 60% of what he had decided earlier. How much is Chirag’s salary?
Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 6
Let x be Chirag’s salary:
(0.12x) X 0.6 = 1260
x = 17500 Rs
Gate Mock Test: Electrical Engineering(EE)- 4 - Question 7
Two pipes can fill a tank in 15 minutes and 25 minutes respectively. Both the pipes are opened together and after some time, the first pipe is closed and the tank is completely full in 15 minutes. For how many minutes is the first pipe opened?
Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 7
t = 6 minutes
Gate Mock Test: Electrical Engineering(EE)- 4 - Question 8
A and B are required to solve a problem independently. If 1/2 and 1/3 are their respectively probabilities of solving the problem, then the probability that at least one of them solves the problem.
Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 8
Probability that at least one of them solves the problem = P
P = 1 – 1/2 X 2/3 = 2/3
Gate Mock Test: Electrical Engineering(EE)- 4 - Question 9
What is the probability that a leap year has 53 Sundays and 52 Mondays?
Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 9
In leap year there are 366 days.
There are 52 weeks + 2 days
1. - Mon. + Tue.
2. - Tue. + Wed.
3. - Wed. + Thu.
4. - Thu. + Fri.
5. - Fri. + Sat.
6. - Sat. + Sun. ? 53 Sundays + 52 Mondays
7. - Sun. + Mon.
Probability = 1/7
Gate Mock Test: Electrical Engineering(EE)- 4 - Question 10
A certain sum of money is invested for one year at a certain rate of simple interest. If the rate of interest is 3% higher, then the interest earned will be 25% more than the interest earned earlier. What is the earlier rate of interest ?
Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 10 Let  be the rate of interest:

r = 12% per annum
Gate Mock Test: Electrical Engineering(EE)- 4 - Question 11

When a lead-acid battery is in fully charged condition, the colour of its positive plate is

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 12
Determine the value of load resistance ,so that it receive maximum power from the circuit.
Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 12
Gate Mock Test: Electrical Engineering(EE)- 4 - Question 13
A plant has the following transfer function, , For an unit step input determine the time required so that response will settle in 2% of its final value.
Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 13
Gate Mock Test: Electrical Engineering(EE)- 4 - Question 14
The open loop transfer function of an unity feedback control system is G(S) = ,What is the range of K so that closed loop system becomes stable ?
Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 14 Characteristics equation
   =                K S(S 1) (S 5) = 0

Rough-array

So for stable system K > 0
and
30 – k > 0
k < 30
so 0 < k < 30
Gate Mock Test: Electrical Engineering(EE)- 4 - Question 15

Determine the peak inverse voltage that appear across the diode in the given circuit.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 15

 

During positive half cycle capacitor get charge and during negative half cycle the equivalent circuit is shown as
    so,    VD    =    VmSinωt
    so,     P1V    =    2Vm
    here,     Vm    =    10 volt,
    so,    P1V    =    20 volt

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 16

Determine the power dissipated across the load resistance RL in the given circuit, assume diode is ideal.

 

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 16

Power dissipate across RL,

                       

here,                                   Vrms  = 5/2

            so,                                  

                                                       = 125 mW

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 17

What is the load current IL in the circuit shown below:

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 17

Apply KCL at node V1,  
                 …..(1)

            Apply KCL at node V2,

                               …..(2)

            From equation (1) and (2)

                            

         Therefore,                    

                                                   = – 10mA 

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 18

How many standard resistor are required to design a 3 bit flash type ADC? 

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 18

Number of resistor,                                 = 2n

                                                             = 23

                                                             = 8

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 19

Determine the size of ROM required to implement a full-substractor.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 19

For full-substractor, the number of input variable is 3 and output function are 2

            So size of ROM,

            23 × 2

            8 × 2

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 20

Determine the even part of the signal x(f) where x(t) = 4 Sin t

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 20

                                           x(t)       =      4 sint

            Since the above signal is an odd signal therefore, its even part is zero.

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 21

An LTI system is characterized by difference equation y (n) = y (n-1) x (n). The impulse response of the system is : 

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 21

y(n)      =                         y(n – 1) x(n)

            ⇒                   

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 22

Consider the signal x(t) = e-2t u(t). Let X(ω) denotes the Fourier transform of the signal, the value of the below equation is:  

 

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 22

Since,   

So, 

Therefore    

                 

                        = 2π

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 23

In the given circuit, the forward threshold voltage of the diode is 0.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 23

Given   PDmax     =  21 mW

            So,   IDmax  =  21mW/0.7  = 30mA

For same operation,

     50 – 0.7 <= 30 R

    19.3  <= 30 R

   R >= 643

So, only option (b) is satisfied.

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 24

When a bypass capacitor is connected across the emitter and resistance of a common-emitter BJT amplifier:

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 25

An amplifier using an op-amp with a slew rate 1 V/μsec has a gain of 20 dB. If the peak value of sinusoidal input signal is 1 V then determine the maximum frequency of the input signal that can be amplify without any distortion.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 25

For distortion less output,

                                           2p fm Af Vm  <= S.R

                                                    

Here,                                           Af = 20dB

i.e,                                              A= 10

 So,                                            

 

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 26

The skin depth of copper at a frequency of 6GHz is 1μm, the skin depth at a frequency of 24 GHz would be :

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 26

Skin Depth, δ =

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 27

If the current changes from 5A to 3A in 2 seconds and the inductance is 10H, calculate the emf.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 27

We know that:
emf=L(i2-i1)/t
Substituting the values from the question, we get emf=10V.

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 28

What is the capacitance when Q = 60 C and V = 12 V?

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 29

The surge impedance of a 400 KV, 100 Km T-line is 300for a 200 Km length, the surge impedance will be.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 29

Because surge impedance of a T-line is independent on line length and frequency

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 30

The dielectric loss of a capacitor can be measured by which one of the following :

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 31

The value of the below integral is equal to

 

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 32

Evaluate, , where C represents a circle 

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 32

Since pole z = 4 lies within the circe. So,

                   

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 33

From his 9 friends (4 boys and 5 girls), Mohan wanted to invite friends for picnic. If there have to be exactly 3 girls in invites, then the number of ways in which he can invite them are,

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 33

Three girls can be selected from 5 girls in 5Cways. As number of boys to be invited is not given, hence out of 4 boys he can invite them in 24 ways, so total of

         24 X 5C3 ways = 16 X   =160 ways

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 34

A dice is rolled 5 times. The probability that 4 will show up exactly 3 times is:

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 34

Probability of getting four is,

                            P(4) = 1/6

So, Required Probability, 

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 35

Consider a vector A given by :

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 35

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 36

Determine V0 in the given circuit below

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 36

                              5V1 = 20

                              V1 = 4 volt,

       So,                  V0 = -V1

                                              = -4 volt

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 37

The Y-parameter of the circuit shown below :

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 37

Compare with standard π network,

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 38

In the circuit shown below, the switch is closed at t=0, determine 

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 38

At t = 0  the equivalent circuit is,

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 39

A voltage commutated chopper circuit operated at 500Hz is shown below. Find circuit turn-off time of main SCR and Aux-SCR

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 39

Circuit turn-off time of

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 40

The value of δ(t) * 2δ(t-1) * 3δ(t-2) is

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 40

δ(t) * 2δ(t-1) * 3δ(t-2)

δ(t) * 6δ(t-3)

6δ(t-3)

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 41

The ROC of z transform of signal x[n] = (4)|n| is

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 41

x(n) = 4|n|

      =  

So,  

ROC > 4 & ROC < 1/4

Since there is no any common ROC so, z-transform does not exist.

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 42

The system matrix of a continuous time system is described in the state variable form is,

The system is stable for

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 42

Matrix, 

Characteristic equation,  ​


 

For a stable system, all the elements in the first column of Routh-array should be positive. In the given option, option (c) satisfy the criteria i.e., A < 0 and B < 1/2

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 43

The resin bonded paper bushings are designed to operate at a maximum radial stress of

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 44

The open-loop transfer function of unity feedback control system is

.

The system is stable for

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 44

Characteristic equation

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 45

In the given logic diagram the propagation delays of both the gates are 20 nsec each. The output y is at logic ‘1’ from a long time and at t = 0, the input x change from 0 to 1, so the output goes momentary to logic 0, determine the time required by the output to again maintain its level at logic 1.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 45

So output again becomes 1 after 40 nsec.

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 46

The logical expression realized by the circuit shown in the figure will be:

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 46

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 47

In the circuit A = 1, B = 1, Qn = 0 and Pn = 1 what will be the output Qn 1 and Pn 1 when the clock input (CK) is applied ?

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 47

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 48

For what value of damping parameter, the transient stability is assured by equal area criterion?

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 48

Equal area criterion is applicable only if damping is zero.

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 49

The current through the resistor R in the given circuit.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 49

V1 = 2volt {Due to virtual short – circuit}

and               

Since β is not given take it to be very large, iem 

                                   I  =    Ic = 10 mA

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 50

Determine the operating point of the BJT, in the given circuit.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 50

            VB       =  5 volt,

            So,   VE  = 5 – 0.7 = 4.3

          IE    =    mA = 1.075 mA

  Now,    VC        =  10 – 2 * IC

                  = 10 – 2*1.075

                  = 7.85V

So,             VCE  = VC – VE

              = 7.85 – 4.3

               = 3.55 V

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 51

In the circuit shown in the given figure, assume that the capacitor C is almost shorted for the frequency range of interest of the input signal. Under this condition, the voltage gain of the amplifier will be approximately.

Given hfe = 100 & hie = 1K

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 51

It is common collector configuration (emitter follower) so voltage gain is almost equal to 1, in the given option Av ≈ 1

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 52

For a Si transistor connected as shown in the fig. VBE = 0.7V. Given that the reverse saturation current of the junction at room temperature is 200 nA, the IC is given by

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 52

Since base is connected to collector of the transistor, therefore it works as a diode

   Ic = I0{eVBE/ηVT-1}

Here, I0 = 200 nA, VBE = 0.7, η = 2, VT = 26 mV

So,         Ic  =  147.86 mA

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 53

A 220 KV, three phase transmission line is 40 Km long. The resistance per phase is 0.15per Km and inductance per phase is 1.5923 mH per Km. The line is supplying a 3 phase load of 381 MVA at 0.8 power factor lagging. Find voltage at sending end will be (per phase)

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 53

Resistance of the line per phase for a length of 40 Km.

      R = 0.15 X 40 = 6 Ohm

Similarly reactance of the line (40 Km) per phase.

            XL = 11.5293 X 40 = 63.69 mH

            Receiving and voltage / phase

Load power factor = 0.8 lagging

 I = =1000 Amp

Sending end voltage, 

VS = V IR cosφ IXLsinφ

     = 127 x 103  1000 x 6 x 0.8 1000 x 63.69 x 10-3 x 0.6

     = 170 KV

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 54

Magnetic flux density in certain medium with permeability μr is given by . The current density is given by

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 54

The current density,

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 55

Given field, Â = 3x2yzâx  x3y  (x3y - 2z)âz   It can be said that A is

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 55

                                  Â = 3x2yzâx  x3y  (x3y - 2z)âz

So the given field is conservative

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 56

A synchronous motor with negligible armature resistance at a load angle of 20° at rated frequency. If supply frequency is increased by 10% keeping other parameters constant the new load angle will be?

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 56

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 57

A variable speed drive rated for 1500 rpm, 40Nm, is reversing under no-load. Figure shows the reversing torque and the speed during the transient. The moment of inertia of the drive is……….

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 57

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 58

A (0-300)V Voltmeter has a guaranteed accuracy of 2% of full scale reading if the voltage measured by this instrument is 180V then the limiting error will be

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 58

                               Error    = 2% of F.S.D.

                                          = 2% of 300 V

                                          = 2/100 x 300 = 6 V

            Measured Value    =     180 V

                               Error   =     6 V

                Absolute error   =    Measured value – True value

                                     6   =    180 - True value

                       Tue Value   =    174 Volt

            Limiting error or % error

                   = 6/174 x 100 =   3.44%

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 59

A fault current of 2000A is passing on the primary side of 400/5 CT on the secondary side of the C.T. an inverse time over current relay is connected whose plug setting is set at 50%. The PSM will be

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 59

The pickup value of the relay is 5A, since the relay setting is 50%

Therefore, The operating current of the relay is

5 x 50/100 = 2.5 A

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 60

If the voltage across the units in a 2-unit suspension insulator is 60% and 40% respectively, of the line voltage. Determine the ratio of the capacitance of the insulator to that of its capacitance to earth.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 60

From figure I = I1 I'1

            V2wkc = V1wkc V1wc

V2wkc = V1wc (k 1)

0.6 Vkwc = 0.4 Vwc (k 1)

⇒ K = 2

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 61

A salient pole synchronous motor is running with normal excitation it the excitation is reduced to zero than?

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 61

because torque developed T = TRl  Telect

            If extn zero electromagnetic zero by reluctance torque present incase of salient pole so it becomes reluctance motor.

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 62

Given a > 0, we wish to calculate the reciprocal value 1/a  by Newton – Raphson method for f(x)=0 for a=7 and starting with X0 = 0.2, the first two iterations would be :

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 62

Here, Let                              

⇒                                        

                       

Therefore,

                        
After Simplification,  

                                    For a = 7                       

Here x0 = 0.2 

                                So x1 = 2 x 0.2 - 7 (0.2)2

                                         = 0.12

and second iteration

                         x2 = 2x1 - 7x12

                             = 2 x 0.12 - 7 (0.2)2

                          x2 = 0.1392

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 63

For what values of 'k' will the pair of equations 3x + 4y = 12 and kx + 12y = 30 NOT have a unique solution?

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 64

The matrix is decomposed into a product of a lower triangular matrix [L] and an upper triangular matrix [U]. The properly decomposed [L] and [U] matrices respectively are

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 4 - Question 64

Gate Mock Test: Electrical Engineering(EE)- 4 - Question 65

f(x) = 2x3 - 15x2 + 36x + 1 is increasing in the interval given below, choose the correct option.

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