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Gate Mock Test: Electrical Engineering(EE)- 9


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65 Questions MCQ Test GATE Electrical Engineering (EE) 2023 Mock Test Series | Gate Mock Test: Electrical Engineering(EE)- 9

Gate Mock Test: Electrical Engineering(EE)- 9 for GATE 2022 is part of GATE Electrical Engineering (EE) 2023 Mock Test Series preparation. The Gate Mock Test: Electrical Engineering(EE)- 9 questions and answers have been prepared according to the GATE exam syllabus.The Gate Mock Test: Electrical Engineering(EE)- 9 MCQs are made for GATE 2022 Exam. Find important definitions, questions, notes, meanings, examples, exercises, MCQs and online tests for Gate Mock Test: Electrical Engineering(EE)- 9 below.
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Gate Mock Test: Electrical Engineering(EE)- 9 - Question 1

Choose the most appropriate word from the options given below to complete the following sentence.
Q. ________ is the key to their happiness; they are satisfied with what they have.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 1

The sentence already mentions a trait that they are satisfied with what they have thus it becomes easy for us to choose the correct word. The meanings of the words are:
Contentment → being satisfied with what one has
Ambition →  a strong desire to do or achieve something.
Perseverance →   persistence in doing something despite difficulty or delay in achieving success.
Hunger →  a feeling of discomfort or weakness caused by lack of food, coupled with the desire to eat.
Thus, contentment is the correct answer.

Gate Mock Test: Electrical Engineering(EE)- 9 - Question 2

Choose the most appropriate words from the options given below to fill in the blanks.
Q. She was ______ to travel abroad and _____ in the field of commerce as per her wishes.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 2

The sentence mentions a person doing something as per her wishes thus the first word must be a positive reaction. 'Restive' which means 'restless' and 'jinxed' which means 'cursed' are incorrect here. Between options 1 and 3,the word 'elated' which means 'too happy' and the word 'venture' which means 'undertake a risky or daring journey or course of action' fit here correctly. The word 'cease' means 'stop' and does not convey a proper meaning. Thus option 3 is the correct answer.

Gate Mock Test: Electrical Engineering(EE)- 9 - Question 3

The Headmaster ___________ to speak to you.
Which of the following options is correct to complete the above sentence?

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 3

The correct tense that fits here is simple present and the subject being singular, the verb should be in the correct form too. Thus 'wants' is the correct answer. The other options are incorrect as:
Is wanting ⇒ it is in present continuous tense which is used to denote an activity which is continuing
Want ⇒ subject is singular thus the verb cannot be in plural form
Was wanting ⇒ it is in past continuous tense which is used to denote an activity which was continuing in the past
Thus option 2 is the correct answer.

Gate Mock Test: Electrical Engineering(EE)- 9 - Question 4

The graph shows cumulative frequency % of research scholars and the number of papers published by them. Which of the following statements is true?

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 4

In this problem, cumulative frequency is given, so converting into frequency

From the table, it is clear that option b, i.e.
60% of the scholars published at least 2 papers is correct.

Gate Mock Test: Electrical Engineering(EE)- 9 - Question 5

If |-2X + 9| = 3 then the possible value of |-X| - X2 would be:

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 5


So -30 will be correct as per provided options.

Gate Mock Test: Electrical Engineering(EE)- 9 - Question 6

A growing world population has caused growing concerns about increasing famine. The population in 2000 was 6 billion. Ten years later the population was 7 billion. There were also more people affected by famines in 2010 than in 2000. Furthermore, in each year from 2000 to 2010, when the world's population increased, so did the number of those affected by famine.
Based on the information given, which of the following is true?

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 6

The number affected by famine always increases with the population. Therefore, if the population increased in 2005, then the number of those affected by famine also increased.
If there was an increase in 2005, there must have been more people affected in that year than the previous year of 2004.
The available information does not allow us to draw any of the other inferences.
The number of those affected by famine could increase without a corresponding percentage of the population increase.
Neither can we draw inferences about any particular year between 2000 and 2010.
Note:
Option 2 cannot be correct because  consider a case where in 2000 the population is 100 , and people affected are 50
in 2001 the population grew to say 200, and people affected is 100
So in Both cases the percentage of people affected is 50% but the number of people affected grew.

Gate Mock Test: Electrical Engineering(EE)- 9 - Question 7

A tunnel of length 360 m is to be constructed. As per the plan, the team has to complete the tunnelling within a specified period of time. For the first four days, the tunnelling was done according to the plan. However, it was found that the resources were being underutilized. It was then decided that the rate of tunnelling should be increased and then they started tunnelling 15 m more than their everyday plan. Therefore, a day before the planned date they had tunnelled to a length of 380 m. How many meters of tunnelling was planned for each day?

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 7

Let, the per day tunnelling plan was ‘x’ meter and the tunnelling of 360 m was to be completed in ‘y’ day.
Therefore, xy = 360----(i)
Now, as per plan tunneling was done for four days and then rate of tunnelling was increased to
(x + 15) for (y - 4) days. One day before the planned date they have tunnelled 380 m.
∴ Number of days when the tunnelling was done at increased rate is
= (y – 4 - 1) = (y - 5) days
According to the statement given the following situations can be inferred
∴ 4x + (y - 5) (x + 15) = 380
⇒ 4x + xy + 15y – 5x – 75 = 380
⇒ 4x + 15y – 5x = 380 + 75 – xy
⇒ 15y – x = 380 + 75 – 360
⇒ 15y – x = 95     ----(ii)
Putting y value from eq (i) in eq (ii) we get

⇒ x2 + 95x – 5400 = 0
On solving the above quadratic equation, we get
⇒ x = 40 m

Gate Mock Test: Electrical Engineering(EE)- 9 - Question 8

Consider a random walk on an infinite two-dimensional triangular lattice, a part of which is shown in the figure below.

If the probabilities of moving to any of the nearest neighbour sites are equal. What is the probability that the walker returns to the starting position at the end of exactly three steps?

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 8


A person can take 1st step in any direction independently
Suppose he moves to A
Now to return to O ( initial point) in 2 steps he can move in 2 directions. Either B or f
Thus probability he will move to either B or F will be 
Suppose he moves to B
Now to return back to O
he has only 1 option
⇒ to move in BO
Probability he will move in BO direction 
Total probability he will return

*Answer can only contain numeric values
Gate Mock Test: Electrical Engineering(EE)- 9 - Question 9

A paper sheet is in the shape of a right angle triangle and cut along a line parallel to hypotenuse leaving a smaller triangle. There was 25% reduction in the length of the hypotenuse of the triangle. If area of triangle initially was 28 cm2 then area of smaller triangle will be ______ cm2.


Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 9


Let PQR is the initial triangle and SQT is the final triangle.
ΔPQR is similar to ΔSQT
∵ ST = 0.75 PR
∴ SQ = 0.75 PQ
And QT = 0.75 QR
Initial Area = 
Final Area = 


= (0.75)2 × 28 = 15.75 cm2

Gate Mock Test: Electrical Engineering(EE)- 9 - Question 10

If x+ x − 1 = 0 what is the value of 

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 10

x2 + x – 1 = 0
x2 + x = 1
x(x + 1) = 1

Again squaring 

Gate Mock Test: Electrical Engineering(EE)- 9 - Question 11

Which of the following Boolean expression represents the given logic circuit?

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 11


 

Y = AB + A(B + C) + B(B + C)
= AB + AB + AC + BB + BC
= AB + AC + B + BC
= AB + AC + B(1 + C)
= AB + AC + B
= B(A + 1) + AC
= B + AC

*Answer can only contain numeric values
Gate Mock Test: Electrical Engineering(EE)- 9 - Question 12

When a 2300/230 V, 50 kVA, 50 Hz transformer is connected as an auto transformer to supply a 2300 V circuit form 2530 V source, the kVA rating of the auto – transformer will be _______(in kVA)


Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 12

kVA rating of transformer = 50 kVA
Auto transformer rating = 2300 / 2530

kVA rating of auto transformer 

Gate Mock Test: Electrical Engineering(EE)- 9 - Question 13

Transformer connections of two three phase transformers are given in the options. Which of the pair is not suitable for the parallel operation.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 13

For the parallel operation, phase displacement angle between secondaries of both transformers must be zero. That means both the transformers must belong to same phase group.

In the given options,
Y/Zig Zag Y and Y/Y belongs to different phasor groups. Hence this pair is not suitable for parallel operation.

*Answer can only contain numeric values
Gate Mock Test: Electrical Engineering(EE)- 9 - Question 14

An 8 pole 3ϕ induction motor has an equivalent rotor resistance of 0.07 Ω/Phase. If its stalling speed is 630 RMP, how much resistance must be added per phase to obtain maximum torque at starting? Ignore magnetizing current.


Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 14


X2 = 0.4375 Ω
Sstarting 
Rext = 0.3675 Ω

Gate Mock Test: Electrical Engineering(EE)- 9 - Question 15

For a system to be minimum phase

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 15

The Basic difinition of minimum phase system in Z-domain is it should have all poles and zerores inside the unit circle.
H(z) stable and causal:
All poles of H(z) are inside the unit circle.

All poles of  i.e. zeroes of H(z) are inside unit circle.

Gate Mock Test: Electrical Engineering(EE)- 9 - Question 16

Let x[n] = e-2n u[n] be the input to a system. Which of the following impulse responses gives the bounded output for this input?

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 16

A system is said to be BIBO stable if it’s impulse response is absolutely summable,

Out of all the responses only  is absolutely summable.

Is not absolutely summable it is divergent.

*Answer can only contain numeric values
Gate Mock Test: Electrical Engineering(EE)- 9 - Question 17

In a 12 phase full wave rectifier if source frequency is 30 Hz, then the ripple frequency will be_____Hz


Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 17

We know that 
Ripple frequency = 2nf = 2 × 12 × 30 = 720 Hz 

*Answer can only contain numeric values
Gate Mock Test: Electrical Engineering(EE)- 9 - Question 18

A 3 phase bridge inverter delivers power to a resistive load 400 V DC source. For a start connected load of 10 Ω/phase. Determine load power (in watt) 1200 conduction mode.


Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 18

Gate Mock Test: Electrical Engineering(EE)- 9 - Question 19

The admittance locus of the circuit shown in figure is

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 19


Gate Mock Test: Electrical Engineering(EE)- 9 - Question 20

While testing a coil having a resistance of 1 Ω, resonance occurred when the oscillator frequency was 10 MHz and the variable capacitor was set at  pF. What is effective value of the coil?

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 20

*Answer can only contain numeric values
Gate Mock Test: Electrical Engineering(EE)- 9 - Question 21

The Bode plot of a system is shown in figure below the magnitude (in dB) at ω = 10 rad/sec is___________ (Assume initial low frequency is 0.5 rad/sec)


Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 21

Magnitude at 10 rad/sec is same as magnitude at 2 rad/sec

6 dB/octave = 20 dB/decade
y = 24.04 dB

*Answer can only contain numeric values
Gate Mock Test: Electrical Engineering(EE)- 9 - Question 22

The frequency at which polar plot of   intersects the -1800 phase line is ______ radian/sec


Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 22

For intersection with -1800 axis
∠GH = -1800

Gate Mock Test: Electrical Engineering(EE)- 9 - Question 23

Power in a three-phase star connected balanced inductive load is measure by two wattmeter method. The phase voltage and phase current are 200 V and 10 A, respectively. The power-factor of load is 0.5. The readings P1 and P2 of the two wattmeter’s are

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 23

Given that,
Phase voltage (Vph) = 200 V
Phase current (Iph) = 10 A
Power factor = cos ϕ = 0.5
⇒ ϕ = cos-1 (0.5) = 600
In two wattmeter method,
W1 = VLIL cos (30 + ϕ)
And
W2 = VLIL cos (30 – ϕ)

*Answer can only contain numeric values
Gate Mock Test: Electrical Engineering(EE)- 9 - Question 24

A galvanometer with a full scale current of 2 A has internal resistance of 500 Ω. The multiplying power of 20 Ω shunt with this galvanometer is –


Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 24

Given that, I = 2 A
Rm = 500 Ω
Rsh = 20 Ω
We know that,

*Answer can only contain numeric values
Gate Mock Test: Electrical Engineering(EE)- 9 - Question 25

A certain 8-bit DAC has a full scale output of 2mA and full scale error of ± 0.5 % full scale reading. The maximum possible output current for an input of 10000000 is__________ μA.


Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 25

*Answer can only contain numeric values
Gate Mock Test: Electrical Engineering(EE)- 9 - Question 26

What is the output voltage Vo of the given circuit.


Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 26


Voltage at A point

By using virtual short circuit condition
VA = VB = 8V
Apply KCL at node B

Gate Mock Test: Electrical Engineering(EE)- 9 - Question 27

Frequency compensation is used in op-amp to increase its

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 27

Frequency compensation is used in operational amplifiers to improve the stability of the op-amp over the input signal frequency range.

Gate Mock Test: Electrical Engineering(EE)- 9 - Question 28

In a short transmission line, if the impedance of the line is (0.01 + j0.15) per unit when the load current is 1.0 p.u. at 0.8 lag power factor and the receiving end voltage Vr = 1.0 p.u, what is the regulation of the line?

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 28

Given that, impedance = (0.01 + j 0.15) p.u.
Resistance (R) = 0.01 p.u.
Reactance (X) = 0.15 p.u.
Voltage regulation
% V.R = [R cos ϕr + X sin ϕr] × 100
= [0.01 × 0.8 + 0.15 × 0.06] × 100
= 0.098 × 100 = 9.8%

*Answer can only contain numeric values
Gate Mock Test: Electrical Engineering(EE)- 9 - Question 29

A three phase transmission line has a self-reactance of 0.2 pu and mutual reactance of 0.05 pu. The sum of positive sequence reactance, negative sequence reactance and zero sequence reactance is __ (in pu)


Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 29

Given that, Xs = 0.2 pu
Xm = 0.05 pu
X1eq = Xs - Xm = 0.2 – 0.05 = 0.15 pu
X2eq = Xs - Xm = 0.2 – 0.05 = 0.15 pu
X0eq = Xs + 2X m = 0.2 + 2 (0.05) = 0.3 pu
X1eq + X0eq + X2eq = 0.6 pu

Gate Mock Test: Electrical Engineering(EE)- 9 - Question 30

In a 30 bus lower system networks, there are 3 voltage controlled buses. The size of Jacobian matrix useful for power system analysis will be

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 30

The size of Jacobian matrix = (2n - 2 - m) × (2n - 2 - m)
Where n is number of buses
M is number of voltage controlled buses
Size of Jacobian matrix = (2 (30) - 2 - 3) × (2 (30) - 2 - 3)
= 55 × 55

Gate Mock Test: Electrical Engineering(EE)- 9 - Question 31

If the determinant of an n × n matrix A is zero, then

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 31

(1) If the determinant of an n × n matrix A is zero then, rank (A) ≤ n – 1.
(2) The trace of A need not be zero.
(3) From the properties of Eigen values, product of Eigen values = determinant = 0.
⇒ At least one of the Eigen values is zero
(4) x = 0 is a trivial solution of Ax = 0
Only trivial solution exists when rank of matrix (A) = n.
Here rank (A) ≤ n – 1, hence infinitely many solutions exists.

Gate Mock Test: Electrical Engineering(EE)- 9 - Question 32

There are five students S1, S2, S3, S4 and S5 in a class and for them there are five seats R1, R2, R3, R4 and R5 arranged in a row, where initially the seat Ri is allotted to the student Si, I = 1, 2, 3, 4, 5, But, on the examination day, the five students are randomly allotted the five seats.
The probability that, on the examination day, the student S1 gets the previously allotted seat R1, and NONE of the remaining students gets the seat previously allotted to him/her is

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 32

This is the case of de arrangement
n(A) = No. of ways of deranging 4 objects

Gate Mock Test: Electrical Engineering(EE)- 9 - Question 33

The Laplace transform of 

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 33

Gate Mock Test: Electrical Engineering(EE)- 9 - Question 34

Find the area of the region bounded by the curves  (see in the graphical represented figure)

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 34

Given equations are 
Intersection point of these two curves will be (1, 1)

Let consider a vertical strip as shown in the figure, then the limits will be X varies from 0.5 to 1 and y varies from 
Now the area will be,

Gate Mock Test: Electrical Engineering(EE)- 9 - Question 35

 is an analytic function. If u(x, y) = 4y(1 – x), then v(x, y) will be

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 35

*Answer can only contain numeric values
Gate Mock Test: Electrical Engineering(EE)- 9 - Question 36

Find the gain margin (in db) for a system whose characteristic equation is s3 + 6s2 + 8s + 10 = 0


Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 36

Characteristic equation
s3 + 6s2 + 8s + 10 = 0

Now find ωPC

Gate Mock Test: Electrical Engineering(EE)- 9 - Question 37

Consider a space vehicle model depicted in the block diagram


A suitable compensation for this system that satisfies the specifications
a) Peak overshoot ≤ 20%
b) Velocity error constant ≥ 10 is 

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 37

Objective approach
The velocity error constant is given by

Only option (a) satisfies the condition for kv. Hence answer is option (a) we do not need to check for peak overshoot.

Gate Mock Test: Electrical Engineering(EE)- 9 - Question 38

The system is defined by the state matrix . The system is

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 38

The characteristic equation of the system is obtained using

Comparing it with standard equation of 2nd order system

Underdamp - system

*Answer can only contain numeric values
Gate Mock Test: Electrical Engineering(EE)- 9 - Question 39

A 3ϕ, 50 Hz Fully controlled bridge converter is Fed with 400 V AC source has Inductance 25 mH/phase. If the thyristor firing angle is 300 and overlap angle is 150, the constant DC load current is ____A


Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 39


*Answer can only contain numeric values
Gate Mock Test: Electrical Engineering(EE)- 9 - Question 40

If the converter shown in figure has a purely resistive load R and firing angle α = 60°, the ripple factor will be ______%.


Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 40

*Answer can only contain numeric values
Gate Mock Test: Electrical Engineering(EE)- 9 - Question 41

A circuit shown in figure, the chopper feed a resistive load from a battery source. Switch S is switched at 300 kHz with duty ratio of 0.4. Find peak value of source current ripple in amp is ________A


Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 41


It is boost converter

*Answer can only contain numeric values
Gate Mock Test: Electrical Engineering(EE)- 9 - Question 42

A circuit shown in the figure has a dc input voltage of 30 V, a 1 : 1 transfer and an ideal MOSFET. The inductor value is 100 μH and the switching frequency is 50 kHz. Assume that the output capacitor is large enough to hold the load voltage constant. The converter is required to deliver 4 A into a 3 Ω resistive load. The ripple current magnitude. (in A)


Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 42


Vo = I × RL = 4 × 3 = 12 V

Gate Mock Test: Electrical Engineering(EE)- 9 - Question 43

Initially there was no energy stored in the 5 H inductor in the circuit in figure shown below when it was placed across the terminals of the voltmeter. At t = 0 the inductor was switched instantaneously to position b where it remained for 1.6s before returning instantaneously to position a. The d’Arsonval voltmeter has a full scale reading of 20 V and a sensitivity of 1000 Ω/V. What will be the reading of the voltmeter be at the instant the switch returns to position a if the inertia of the d’Arsonaval movement is negligibe?

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 43

For 0 ≤ t ≤ 1.6 s

Gate Mock Test: Electrical Engineering(EE)- 9 - Question 44

A 3-bit synchronous counter using three D-flipflops is show. The output sequence of the counter starting from Q0Q1Q2 = 000 is

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 44

Initial value of Q0Q1Q2 = 000

Sequence of the counter is: 0, 4, 6, 7, 3, 1, 0, ….

Gate Mock Test: Electrical Engineering(EE)- 9 - Question 45

The given circuit represents the realization of a Boolean function using 8 to 1 multiplexer. The realization of the same Boolean function using 4 to 1 multiplexer will be

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 45

the output of the given multiplexer is
F = S̅2 S̅1 S̅0 I 0 + S̅2 S̅1 S0 I 1 + S̅2 S1 S̅0 I 2 + S̅2 S1 S0 I 3 + S2 S̅1 S̅0 I 4 + S2 S̅1 S0 I 5 + S2 S1 S̅0 I 6 + S2 S1 S0 I7
= A̅ B̅ C̅ I0 + A̅ B C̅ I2 + A B̅ C̅ I4 + ABC I7
= A̅ B̅ C̅ + A̅ B C̅ + A B̅ C̅ + A B C
Now, implement the above function by using 4 to 1 MUX by taking B and C as selection lines

Now, the circuit will be

Now, implement the above function by using 4 to 1 mux by taking AB as selection lines.

Now, the circuit will be

Now implement the above function by using 4 to 1 MUX by taking A and C as selection lines

I0 = 1, I1 = 0, I2 = B̅, I3 = B
Now, the circuit will be

Gate Mock Test: Electrical Engineering(EE)- 9 - Question 46

At 50% of full load the armature current drawn by a dc shunt motor is 40 A when connected to a 200 V supply. By decreasing the field flux its speed is raised by 20%. This also causes a 10% increase in load torque. The armature resistance including the brushes is 1 ohm. Neglecting armature reaction and saturation the percentage change in field current will be

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 46

Gate Mock Test: Electrical Engineering(EE)- 9 - Question 47

A synchronous motor has 1000 KW, 3ϕ, Y connected 3.3 KV, 28 poles, 50 Hz. synchronous reactance of 4.20 Ω/ph. Its field excitation is adjusted to result in unity P.F operation at rated load. Compute the maximum power that the motor can deliver with its excitation remaining constant at this value.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 47

*Answer can only contain numeric values
Gate Mock Test: Electrical Engineering(EE)- 9 - Question 48

A 3-phase, 50 Hz, 12 pole induction motor has star connected rotor and the resistance measured across any two slip ring is 0.04 Ω. Its full load slip is 0.02 the torque required by the load varies as the speed squared. The torque slip curve to be a straight line. In the normal operating region. The resistance to be inserted in the rotor circuit to reduce the full load speed 350 RPM is ______


Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 48

Gate Mock Test: Electrical Engineering(EE)- 9 - Question 49

Two shunt generators A and B rated as 50 kW, 500 V and 100 kW, 500 V respectively operating in parallel deliver a total current of 250 A. The regulation of generators A and B are 6 % and 4 % respectively. The currents IA and IB delivered by the generators are

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 49

For generator A,
Full load current, 
Full load voltage drop, 
Voltage of A at load current 

For generator B,

Voltage of A at load current IB

Gate Mock Test: Electrical Engineering(EE)- 9 - Question 50

If 
Then the Fourier transform of the signal shown in the figure is

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 50

y(t) = x(t + 1) – x(2t - 1)

Gate Mock Test: Electrical Engineering(EE)- 9 - Question 51

A Periodic square wave is shown and defined as


The correct plot of fourier series coefficients

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 51

The Various fourier series coefficients

*Answer can only contain numeric values
Gate Mock Test: Electrical Engineering(EE)- 9 - Question 52

For the circuit shown in the figure below the value of Vo in volts is______ is


Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 52

By applying KVL in the second loop,
-40io – 5io + 18 ix = 0
⇒ 18 ix = 45 io
⇒ 2 ix = 5 io
By applying KVL in the right most loop
-40io + 8ix + 40 = 0
⇒ - 40io + 4(5 io) + 40 = 0
⇒ io = 2 A
⇒ Vo = 40 io = 40 (2) = 80 V

Gate Mock Test: Electrical Engineering(EE)- 9 - Question 53

For the circuit given below, find VAB (in V) and RAB (in Ohm)

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 53

First, open 1 kΩ branch

KCL [Super node]


*Answer can only contain numeric values
Gate Mock Test: Electrical Engineering(EE)- 9 - Question 54

For the network shown below, maximum power transferred to RL is _____ (in W)


Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 54


To find Thevenin’s voltage, we need to find open circuit voltage across load RL.

By applying KVL at the input side.
-10 + 4I1 + V1 = 0
From equations 1 and 2
⇒ V1 = 2V2 and I1 = V2
⇒ -10 + 4V2 + 2V2 = 0

To find Thevenin’s resistance: we need to suppress all the independent source in the circuit.
V = V2,
I = I2.
By KVL at input loop,

Equivalent Thevenin’s network is,

Maximum power 

*Answer can only contain numeric values
Gate Mock Test: Electrical Engineering(EE)- 9 - Question 55

In the circuit shown in figure the transistor has β of 200. Find the input resistance Rin (in Ω)


Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 55

β = 200, α = 0.995
Collector (Ic) = α IE = 0.995 × 10 = 9.95 mA
Vc = 9.95 × 100 = 0.995 V

Transistor working in active region

Gate Mock Test: Electrical Engineering(EE)- 9 - Question 56

In the circuit shown below the steady-state in reached with the switch K open. Subsequently the switch is closed at time t = 0.

At time 

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 56

As the steady state is reached with the switch open, at t = 0- the capacitor will be open and inductor will be short.
At = t = 0-


At t = 0+
By applying KVL
-5 + I + 2I + 10 = 0

By applying kVL,
-1 – V2 + 2 I + 10 = 0

Gate Mock Test: Electrical Engineering(EE)- 9 - Question 57

Potential field  The volume charge density at point  in free space is

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 57


Gate Mock Test: Electrical Engineering(EE)- 9 - Question 58

Two electric dipoles aligned parallel to each other and having the same axis exert a force F on each other, when a distance d apart, If the dipoles are a distance 2d a part, then the mutual force between them would be

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 58

We know that,
Force between two charges is 

In 2 dipoles 4 charges present.

If distance is 2d,
⇒ F

Gate Mock Test: Electrical Engineering(EE)- 9 - Question 59

A two generator station supplies a feeder through a bus shown in figure. Additional power is fed to the bus through a transformer from a large system which may be regarded as infinite. A reactor X is included between the transformer and the bus to limit the SC rupturing capacity of the feeder circuit breaker B to 333 MVA (fault close to breaker). Find the inductive reactance of the reactor required.
System data are:
Generator G1: 25 MVA, 15% reactance
Generator G2: 50 MVA, 20% reactance
Transformer T1: 100 MVA, 8% reactance
Transformer T2: 40 MVA, 10% reactance
Assume that all reactance are given an appropriate voltage bases. Choose a base of 100 MVA.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 59


All reactance are given an approximate voltage bases.
Perrault no load voltage = 1 pu
Base = 100 MVA
SC rupturing capacity of breaker 
Equivalent system reactance 
Equivalent system reactance at generator bus
= 0.3 - 0.08 = 0.22 pu

*Answer can only contain numeric values
Gate Mock Test: Electrical Engineering(EE)- 9 - Question 60

A circuit breaker is employed to quench the magnetizing current of a 80 MVA transformer at 230 kV. The magnetizing current is 4% of full load current. Now, the circuit breaker is opened when the magnetizing current is as its peak value. The stray capacitance is 4 pF and inductance is 25 mH. The maximum voltage appears across the circuit is ______(in kV)


Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 60

Gate Mock Test: Electrical Engineering(EE)- 9 - Question 61

In which case the system of equations
x– 2x2 + x3 = 3
2x1 – 5x2 + 2x3 = 2
x1 + 2x2 + λx3 = μ
has infinite number of solutions?

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 61

The system of equations has infinite solutions when ρ(A) = ρ(A|B) < n

Gate Mock Test: Electrical Engineering(EE)- 9 - Question 62

A system consisting of n components functions if, and only if, at least one of n components functions. Suppose that all the n components of the system function independently, each with probability 3/4. If the probability of functioning of the system is 63./64, then the value of n is

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 62

Probability of the component to function (p) = 3/4
Probability of the component not to function (q) = 1/4
Probability of functioning the system  = 63/64
⇒ Probability that at least one component function = 63/64
⇒ Probability that no component functions 

*Answer can only contain numeric values
Gate Mock Test: Electrical Engineering(EE)- 9 - Question 63

If a root of the equation 3x3 – 4x2 – 4x + 7 = 0 is found out using Newton Raphson’s method. If the initial assumption for the root is 2, then the root after two iterations will be – (upto three decimal places)


Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 63

Gate Mock Test: Electrical Engineering(EE)- 9 - Question 64

Evaluate  where c is the circle |z| = 2.

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 64

By Cauchy’s integral formula 

Gate Mock Test: Electrical Engineering(EE)- 9 - Question 65

Let y(x) be the solution of the differential equation 

Detailed Solution for Gate Mock Test: Electrical Engineering(EE)- 9 - Question 65

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