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For the circuit shown in fig. the input resistance is
In the circuit of fig. the opamp slew rate is SR = 0.5 V/μs. If the amplitude of input signal is 0.02 V, then the maximum frequency that may be used is
In the circuit of fig. the input offset voltage and input offset current are V_{io} = 4 mV and I_{io} = 150 nA. The total output offset voltage is
If ‘V’ is the voltage phasor and ‘I’ is the current phasor, then VI represents
Consider the circuit shown below
Que: If v_{i} = 2 V, then output v_{o} is
The circuit shown in fig. is at steady state before the switch opens at t = 0. The v_{c}(t) for t > 0 is
The LED in the circuit of fig. will be on if v_{i }is
In the circuit of fig. the CMRR of the opamp is 60 dB. The magnitude of the v_{o} is
The analog multiplier X of fig. has the characteristics v_{p} = v_{1}v_{2} The output of this circuit is
If the input to the ideal comparator shown in fig. is a sinusoidal signal of 8 V (peak to peak) without any DC component, then the output of the comparator has a duty cycle of
In the opamp circuit given in fig. the load current i_{L} is
In the circuit of fig. output voltage is v_{o} =1 V for a certain set of ω, R, an C. The v_{o} will be 2 V if
The phase shift oscillator of fig. operate at f = 80 kHz. The value of resistance R_{F} is
The value of C required for sinusoidal oscillation of frequency 1 kHz in the circuit of fig. is
In the circuit shown in fig. the opamp is ideal. If β_{F} = 60, then the total current supplied by the 15 V source is
In the circuit in fig. both transistor Q_{1} and Q_{2} are identical. The output voltage at T = 300 K is
In the opamp series regulator circuit of fig. V_{z} = 62. V, V_{BE} = 0.7 V and β = 60. The output voltage v_{o} is
23 docs263 tests

23 docs263 tests
