Test: PCI BUS - Input-Output Organization


20 Questions MCQ Test Computer Architecture & Organisation (CAO) | Test: PCI BUS - Input-Output Organization


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QUESTION: 1

The PCI follows a set of standards primarily used in _____ PC’s.

Solution:

Answer: c
Explanation: The PCI BUS has a closer resemblance to IBM architecture.

QUESTION: 2

The ______ is the BUS used in Macintosh PC’s.

Solution:

Answer: a
Explanation: The NuBUS is an extension of the processor BUS in Macintosh PC’s.

QUESTION: 3

The key feature of the PCI BUS is

Solution:

Answer: b
Explanation: The PCI BUS was the first to introduce plug and play interface for I/O devices.

QUESTION: 4

PCI stands for _______

Solution:

Answer: a
Explanation: The PCI BUS is used as an extension for the processor BUS.

QUESTION: 5

The PCI BUS supports _____ address space/s.

Solution:

Answer: d
Explantion: The PCI BUS is mainly built to provide a wide range of connectivity for devices.

QUESTION: 6

 ______ address space gives the PCI its plug and play capability.

Solution:

Answer: a
Explanation: The coniguration address space is used to store the details of the connected device.

QUESTION: 7

_____ provides a seperate physical connection to the memory.

Solution:

Answer: c
Explanation: The PCI bridge is circuit that acts as a bridge between the BUS and the memory.

QUESTION: 8

When transfering data over the PCI BUS, the master as to hold the address till the completion of transfer to the slave. 

Solution:

Answer: b
Explanation: The address is stored by the slave in a buffer and hence it is not required by the master to hold it.

QUESTION: 9

The master is also called as _____ in PCI terminology.

Solution:

Answer: a
Explanation: The Master is also called as initiator in PCI terminology as it is the one that initiates a data transfer.

QUESTION: 10

Signals whose names end in ____ are asserted in the low voltage state.

Solution:
QUESTION: 11

A complete transfer operation over the BUS, involving the address and a burst of data is called _____

Solution:
QUESTION: 12

The device connected to the BUS are given addresses of ____ bit.

Solution:

Answer: b
Explanation: Each of the devices connected to the BUS will be allocated an address during the initialisation phase.

QUESTION: 13

The PCI BUS has _____ interrupt request lines.

Solution:

Answer: c
Explanation: The interrupt request lines are used by the devices connected to raise the interrupts.

QUESTION: 14

_____ signal is sent by the initiator to indicate the duration of the transaction.

Solution:

Answer: a
Explanation: The FRAME signal is used to indicate the time required by the device.

QUESTION: 15

 ______ signal is used enable commands.

Solution:

Answer: d
Explanation: The signal is used to enable a 4 command lines.

QUESTION: 16

 IRDY# signal is used for _______

Solution:

Answer: c
Explanation: The initiator transmits this signal to tell the target that it is ready.

QUESTION: 17

The signal used to indicate that the slave is ready is _____

Solution:
QUESTION: 18

DEVSEL# signal is used

Solution:

This is signal is activated by the device after it as recognised the address and commands put on the BUS.

QUESTION: 19

The signal used to initiate device select ________

Solution:

Answer: d
Explanation: This signal is used to initialisation of device select.

QUESTION: 20

The PCi BUS allowsus to connect _______ I/O devices.

Solution:

Answer: a
Explanation: The PCI BUS allows only 21 devices to be connected as only the higher order 21 bits of the 32 bit address space is used to specify the device.

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