Test: Parallel & Serial Port
20 Questions MCQ Test Computer Architecture & Organisation (CAO) | Test: Parallel & Serial Port
The _____ circuit enables the generation of the ASCII code when the key is pressed.
Answer: c
Explanation: The signal generated upon the pressing of a button is encoded by the encoder circuit into the corresponding ASCII value.
To overcome multiple signals being generated upon a single press of the button, we make use of ______
Answer: b
Explanation: When the button is pressed,the contact surfaces bounce and hence it might lead to generation of multiple signals.In order to overcome this we use Debouncing circuits.
The best mode of conncetion between devices which need to send or recieve large amounts of data over a short distance is _____
Answer: c
Explanation: The parallel port transfers around 8 to 16 bits of data simultaneously over the lines, hence increasing transfer rates.
The output of the encoder circuit is/are ______
Answer: b
Explanation: The encoder outputs the ASCII value along with the valid signal which indicates that a key was pressed.
The disadvantage of using parallel mode of communication is ______
Answer: a
Explanation: The parallel mode of data transfer is costly as it involves data being sent over parallel lines.
In a 32 bit processor, the A0 bit of the address line is connected to _____ of the parallel port interface.
The Status flag circuit is implemented using _____
Answer: b
Explanation: The circuit is implemented using the edge triggered D flip flop, that is triggered on the rising edge of the valid signal.
In the output interface of the parallel port, along with the valid signal ______ is also sent.
Answer: b
Explanation: The idle signal is used to check if the device is idle and ready to receive data.
DDR stands for __________
Answer: a
Explanation: This register is used to control the flow of data from the DATAOUT register.
In a general 8-bit parallel interface, the INTR line is connected to _______
The mode of transmission of data, where one bit is sent for each clock cycle is ______
Answer: d
Explanation: In isochronous mode of transmission, each bit of the data is sent per each cycle.
The transformation between the Parallel and serial ports is done with the help of ______
Answer: c
Explanation: The Shift registers are used to output the data in a desired format based on the need.
The serial port is used to connect basically _____ and processor.
Answer: a
Explanation: The serial port is used to connect keyboard and other devices which input or output one bit at a time.
The double buffer is used for
______ to increase the flexibility of the serial ports.
Answer: b
Explanation: The ports are made more flexible by enabling the input or output of different clock signals for different devices.
UART stands for ________
Answer: c
Explanation: The UART is a standard developed for designing serial ports.
The key feature of UART is
The data transfer in UART is done in ______
Answer: a
Explanation: This basically means that the data transfer is done in asynchronous mode.
The standard used in serial ports to facilitate communication is _____
Answer: c
Explanation: This is a standard which acts as a protocol for message communication involving serial ports.
In serial port interface, the INTR line is connected to _____
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