Semiconductor Electronics- 2 Practice Questions - DPP for NEET

 Page 1


1. (b)
Forward
biased
reverse
biased
N N
P
2. (d) a is the ratio of collector current and emitter current
while b is the ratio of collector current and base current.
3. (a) Emitter current I
e
 = 
Ne
t
 = 
10 19
6
10 1.6 10
10
-
-
´´
 = 1.6 mA
Base current  I
b
 = 
2
100
 × 1.6 = 0.032 mA
But,  I
e
 = I
c
 + I
b
\ I
c
 = I
e
 – I
b
 = 1.6 – 0.032 = 1.568 mA
\ a =
c
e
I
I
 = 
1.568
1.6
 = 0.98 and b = 
c
b
I
I
 = 
1.568
0.032
 = 49
4. (d)
5. (d)
90
10 0.9 11
100
= ´ Þ = ´ Þ=
C E EE
i i i I mA
Also 
E B CB
i i i i 11 10 1mA = + Þ = -=
6. (d) 50, 1000 , 0.01 b= = W=
i
R VV
c
b
i
i
b=
and 
5
3
0.01
10
10
i
b
i
V
iA
R
-
= ==
Hence 
5
50 10 500
-
= ´ =m
c
i AA
7. (c)
0.8
0.84
(1 0.8)
a=Þb==
-
Also 4 6 24
D
b= Þ D =b ´ D = ´ =
D
c
cb
b
i
i i mA
i
8. (b)
eb c ce b
i i i i ii = +Þ =-
9. (b)
10. (d) For CE configuration voltage gain /
Li
RR = b´
Power gain 
2
/
Li
Power gain
RR
Voltage gain
=b ´ Þ =b
11. (b) For ‘OR’ gate 
X AB =+
i.e. 0 0 0, += 0 11,1 0 1,1 11 + = + = +=
12. (a)
. C AB A B AB = =+ =+
(De morgan’s theorem)
Hence output 
C
is equivalent to OR gate.
. .. C ABABAB ABAB ABAB = = + =+=
In this case output 
C
is equivalent to AND gate.
13. (c) For ‘XNOR’ gate Y A B AB =+
i.e. 0.0 0.0 1.1 0.0 1 0 1 += +=+ =
0. 1 0.1 1.0 0.1 0 0 0 +=+ = + =
1.0 1.0 0.1 1.0 0 0 0 +=+= + =
1. 1 1.1 0.0 1.1 0 1 1 + = + = +=
14. (d) The output D for the given combination
( ). () D ABC AB C = + = ++
If 
0 ABC = ==
then
(00)0 00 1 1 1 D= + + = + =+=
If 1,0 A BC = == then
D
= (1 1) 0 1 0 0 11 + += += + =
15. (a) The Boolean expression for ‘NOR’ gate is Y AB =+
i.e. if 
0 AB ==
(Low),  
0 0 01 Y= + ==
(High)
16. (d) The Boolean expression for ‘AND’ gate is . R PQ =
1.1 1,1.0 0,0.1 0,0.0 0 Þ = = ==
17. (a) The given Boolean expression can be written as
( ).(.) (.).( ) ( ). (.) =+=+= + Y A B AB AB A B AA B A B B
. = += AB AB AB
A B Y
0 0 1
1 0 0
0 1 0
1 1 0
Page 2


1. (b)
Forward
biased
reverse
biased
N N
P
2. (d) a is the ratio of collector current and emitter current
while b is the ratio of collector current and base current.
3. (a) Emitter current I
e
 = 
Ne
t
 = 
10 19
6
10 1.6 10
10
-
-
´´
 = 1.6 mA
Base current  I
b
 = 
2
100
 × 1.6 = 0.032 mA
But,  I
e
 = I
c
 + I
b
\ I
c
 = I
e
 – I
b
 = 1.6 – 0.032 = 1.568 mA
\ a =
c
e
I
I
 = 
1.568
1.6
 = 0.98 and b = 
c
b
I
I
 = 
1.568
0.032
 = 49
4. (d)
5. (d)
90
10 0.9 11
100
= ´ Þ = ´ Þ=
C E EE
i i i I mA
Also 
E B CB
i i i i 11 10 1mA = + Þ = -=
6. (d) 50, 1000 , 0.01 b= = W=
i
R VV
c
b
i
i
b=
and 
5
3
0.01
10
10
i
b
i
V
iA
R
-
= ==
Hence 
5
50 10 500
-
= ´ =m
c
i AA
7. (c)
0.8
0.84
(1 0.8)
a=Þb==
-
Also 4 6 24
D
b= Þ D =b ´ D = ´ =
D
c
cb
b
i
i i mA
i
8. (b)
eb c ce b
i i i i ii = +Þ =-
9. (b)
10. (d) For CE configuration voltage gain /
Li
RR = b´
Power gain 
2
/
Li
Power gain
RR
Voltage gain
=b ´ Þ =b
11. (b) For ‘OR’ gate 
X AB =+
i.e. 0 0 0, += 0 11,1 0 1,1 11 + = + = +=
12. (a)
. C AB A B AB = =+ =+
(De morgan’s theorem)
Hence output 
C
is equivalent to OR gate.
. .. C ABABAB ABAB ABAB = = + =+=
In this case output 
C
is equivalent to AND gate.
13. (c) For ‘XNOR’ gate Y A B AB =+
i.e. 0.0 0.0 1.1 0.0 1 0 1 += +=+ =
0. 1 0.1 1.0 0.1 0 0 0 +=+ = + =
1.0 1.0 0.1 1.0 0 0 0 +=+= + =
1. 1 1.1 0.0 1.1 0 1 1 + = + = +=
14. (d) The output D for the given combination
( ). () D ABC AB C = + = ++
If 
0 ABC = ==
then
(00)0 00 1 1 1 D= + + = + =+=
If 1,0 A BC = == then
D
= (1 1) 0 1 0 0 11 + += += + =
15. (a) The Boolean expression for ‘NOR’ gate is Y AB =+
i.e. if 
0 AB ==
(Low),  
0 0 01 Y= + ==
(High)
16. (d) The Boolean expression for ‘AND’ gate is . R PQ =
1.1 1,1.0 0,0.1 0,0.0 0 Þ = = ==
17. (a) The given Boolean expression can be written as
( ).(.) (.).( ) ( ). (.) =+=+= + Y A B AB AB A B AA B A B B
. = += AB AB AB
A B Y
0 0 1
1 0 0
0 1 0
1 1 0
DPP/ P 58
159
18. (c) The Boolean expression for the given combination is
output ( ). Y A BC =+
The truth table is
A B C Y = (A + B).C
0 0 0 0
1 0 0 0
0 1 0 0
0 0 1 0
1 1 0 0
0 1 1 1
1 0 1 1
1 1 1 1
Hence A = 1, B = 0, C = 1
19. (d) For ‘NAND’ gate 
. C AB =
i.e. 0.0 0 1, 0.1 0 1 = = ==
1.0 0 1,1.1 1 0 = = ==
20. (d)
Hence option (d) is true.
21. (c)
True Table
XY
X Y
     
P = X + Y
  
Q = X.Y
  
R = P+Q
011 0 1 1 0
110 0 1 1 0
100 1 0 0 1
001 1 1 1 0
Hence X = 1, Y = 0 gives output R = 1
22. (c)
96 . 0
I
I
e
c
=
e c
I 96 . 0 I = Þ
But  
b e b c e
I I 96 . 0 I I I + = + =
Þ 
e b
I 04 . 0 I =
\  Current gain, 24
I 04 . 0
I 96 . 0
I
I
e
e
b
c
= = = b
23. (a)
24. (b)
25. (a)
26. (b) The probability that a state with energy E is occupied
is given by
F
(EE)/kT
1
P(E)
e1
-
=
+
, where E
F
 is the Fermi energy , ,
T is the temperature on the Kelvin scale, and k is the
Boltzmann constant. If energies are measured from the
top of the valence band, then the energy associated with
a state at the bottom of the conduction band is E = 1.11
eV. Furthermore, kT = (8.62 × 10
–5
 eV/K) (300K) =
0.02586 eV. For pure silicon, E
F
 = 0.555 eV and
(E – E
F
)/kT = (0.555eV) / (0.02586eV) = 21.46. Thus,
10
46 . 21
10 79 . 4
1 e
1
) E ( P
-
´ =
+
=
For the doped semi-conductor,
(E – E
F
) / kT = (0.11 eV) / (0.02586 eV) = 4.254
and 
2
254 . 4
10 40 . 1
1 e
1
) E ( P
-
´ =
+
=
.
27. (a) The energy of the donor state, relative to the top of the
valence bond, is 1.11 eV – 0.15 eV = 0.96 eV. The
Fermi energy is 1.11 eV – 0.11 eV = 1.00 eV . Hence,
F
(E E ) / kT (0.96eV 1.00eV) - =-
/(0.02586eV) 1.547 =-
and 824 . 0
1 e
1
) E ( P
547 . 1
=
+
=
-
28. (d) In diode the output is in same phase with the input
therefore it cannot be used to built NOT gate.
29. (a) This is Boolean expression for ‘OR’ gate.
30. (d) Statement -1 is true but statement -2 is false.
If A = 1, B = 0, C = 1 then Y = 0