Short Notes: Register

 Page 1


                                                               
 
Register 
A register is a sequential circuit  with n + 1 (not counting the clock) inputs and n output. To each of the outputs 
corresponds an input. The first n inputs will be called x
0
 trough x
n-1
 and the last input will be called ld (for load). The n 
outputs will be called y
0
 trough y
n-1
.  
When the ld input is 0, the outputs are uneffected by any clock transition. When the ld input is 1, the x inputs are stored 
in the register at the next clock transition, making the y outputs into copies of the x inputs before the clock transition.  
We can explain this behavior more formally with a state table. As an example, let us take a register with n = 4. The left 
side of the state table contains 9 columns, labeled x0, x1, x2, x3, ld, y0, y1, y2, and y3. This means that the state table 
has 512 rows. We will therefore abbreviate it. Here it is:  
  ld x3 x2 x1 x0 y3 y2 y1 y0 | y3' y2' y1' y0' 
  ------------------------------------------- 
   0  --  --  --  -- c3 c2 c1 c0  | c3  c2  c1  c0 
   1 c3 c2  c1    c0 -- -- -- --  | c3  c2  c1  c0 
As you can see, when ld is 0 (the top half of the table), the right side of the table is a copy of the values of the old 
outputs, independently of the inputs. When ld is 1, the right side of the table is instead a copy of the values of the inputs, 
independently of the old values of the outputs.  
Registers play an important role in computers. Some of them are visible to the programmer, and are used to hold 
variable values for later use. Some of them are hidden to the programmer, and are used to hold values that are internal to 
the central processing unit, but nevertheless important.  
Shift registers 
Shift registers are a type of sequential logic circuit, mainly for storage of digital data.  They are a group of flip-flops 
connected in a chain so that the output from one flip-flop becomes the input of the next flip-flop.  Most of the registers 
possess no characteristic internal sequence of states.  All the flip-flops are driven by a common clock, and all are set or 
reset simultaneously.  
In this section, the basic types of shift registers are studied, such as Serial In - Serial Out, Serial In - Parallel Out, 
Parallel In - Serial Out, Parallel In - Parallel Out, and bidirectional shift registers.  A special form of counter - the shift 
register counter, is also introduced.  
Serial In - Serial Out Shift Registers  
A basic four-bit shift register can be constructed using four D flip-flops, as shown below.  The operation of the circuit is 
as follows.  The register is first cleared, forcing all four outputs to zero.  The input data is then applied sequentially to 
the D input of the first flip-flop on the left (FF0).  During each clock pulse, one bit is transmitted from left to right. 
 Assume a data word to be 1001.  The least significant bit of the data has to be shifted through the register from FF0 to 
FF3.  
 
 
Page 2


                                                               
 
Register 
A register is a sequential circuit  with n + 1 (not counting the clock) inputs and n output. To each of the outputs 
corresponds an input. The first n inputs will be called x
0
 trough x
n-1
 and the last input will be called ld (for load). The n 
outputs will be called y
0
 trough y
n-1
.  
When the ld input is 0, the outputs are uneffected by any clock transition. When the ld input is 1, the x inputs are stored 
in the register at the next clock transition, making the y outputs into copies of the x inputs before the clock transition.  
We can explain this behavior more formally with a state table. As an example, let us take a register with n = 4. The left 
side of the state table contains 9 columns, labeled x0, x1, x2, x3, ld, y0, y1, y2, and y3. This means that the state table 
has 512 rows. We will therefore abbreviate it. Here it is:  
  ld x3 x2 x1 x0 y3 y2 y1 y0 | y3' y2' y1' y0' 
  ------------------------------------------- 
   0  --  --  --  -- c3 c2 c1 c0  | c3  c2  c1  c0 
   1 c3 c2  c1    c0 -- -- -- --  | c3  c2  c1  c0 
As you can see, when ld is 0 (the top half of the table), the right side of the table is a copy of the values of the old 
outputs, independently of the inputs. When ld is 1, the right side of the table is instead a copy of the values of the inputs, 
independently of the old values of the outputs.  
Registers play an important role in computers. Some of them are visible to the programmer, and are used to hold 
variable values for later use. Some of them are hidden to the programmer, and are used to hold values that are internal to 
the central processing unit, but nevertheless important.  
Shift registers 
Shift registers are a type of sequential logic circuit, mainly for storage of digital data.  They are a group of flip-flops 
connected in a chain so that the output from one flip-flop becomes the input of the next flip-flop.  Most of the registers 
possess no characteristic internal sequence of states.  All the flip-flops are driven by a common clock, and all are set or 
reset simultaneously.  
In this section, the basic types of shift registers are studied, such as Serial In - Serial Out, Serial In - Parallel Out, 
Parallel In - Serial Out, Parallel In - Parallel Out, and bidirectional shift registers.  A special form of counter - the shift 
register counter, is also introduced.  
Serial In - Serial Out Shift Registers  
A basic four-bit shift register can be constructed using four D flip-flops, as shown below.  The operation of the circuit is 
as follows.  The register is first cleared, forcing all four outputs to zero.  The input data is then applied sequentially to 
the D input of the first flip-flop on the left (FF0).  During each clock pulse, one bit is transmitted from left to right. 
 Assume a data word to be 1001.  The least significant bit of the data has to be shifted through the register from FF0 to 
FF3.  
 
 
                                                               
 
In order to get the data out of the register, they must be shifted out serially.  This can be done destructively or non-
destructively.  For destructive readout, the original data is lost and at the end of the read cycle, all flip-flops are reset to 
zero.  
To avoid the loss of data, an arrangement for a non-destructive reading can be done by adding two AND gates, an OR 
gate and an inverter to the system.  The construction of this circuit is shown below. 
 
The data is loaded to the register when the control line is HIGH (ie WRITE).  The data can be shifted out of the register 
when the control line is LOW (ie READ) 
Serial In - Parallel Out Shift Registers  
For this kind of register, data bits are entered serially in the same manner as discussed in the last section.  The difference 
is the way in which the data bits are taken out of the register.  Once the data are stored, each bit appears on its respective 
output line, and all bits are available simultaneously.  A  construction of a four-bit serial in - parallel out register is 
shown below.  
 
A four-bit parallel in - serial out shift register is shown below.  The circuit uses D flip-flops and NAND gates for 
entering data (ie writing) to the register.  
 
Page 3


                                                               
 
Register 
A register is a sequential circuit  with n + 1 (not counting the clock) inputs and n output. To each of the outputs 
corresponds an input. The first n inputs will be called x
0
 trough x
n-1
 and the last input will be called ld (for load). The n 
outputs will be called y
0
 trough y
n-1
.  
When the ld input is 0, the outputs are uneffected by any clock transition. When the ld input is 1, the x inputs are stored 
in the register at the next clock transition, making the y outputs into copies of the x inputs before the clock transition.  
We can explain this behavior more formally with a state table. As an example, let us take a register with n = 4. The left 
side of the state table contains 9 columns, labeled x0, x1, x2, x3, ld, y0, y1, y2, and y3. This means that the state table 
has 512 rows. We will therefore abbreviate it. Here it is:  
  ld x3 x2 x1 x0 y3 y2 y1 y0 | y3' y2' y1' y0' 
  ------------------------------------------- 
   0  --  --  --  -- c3 c2 c1 c0  | c3  c2  c1  c0 
   1 c3 c2  c1    c0 -- -- -- --  | c3  c2  c1  c0 
As you can see, when ld is 0 (the top half of the table), the right side of the table is a copy of the values of the old 
outputs, independently of the inputs. When ld is 1, the right side of the table is instead a copy of the values of the inputs, 
independently of the old values of the outputs.  
Registers play an important role in computers. Some of them are visible to the programmer, and are used to hold 
variable values for later use. Some of them are hidden to the programmer, and are used to hold values that are internal to 
the central processing unit, but nevertheless important.  
Shift registers 
Shift registers are a type of sequential logic circuit, mainly for storage of digital data.  They are a group of flip-flops 
connected in a chain so that the output from one flip-flop becomes the input of the next flip-flop.  Most of the registers 
possess no characteristic internal sequence of states.  All the flip-flops are driven by a common clock, and all are set or 
reset simultaneously.  
In this section, the basic types of shift registers are studied, such as Serial In - Serial Out, Serial In - Parallel Out, 
Parallel In - Serial Out, Parallel In - Parallel Out, and bidirectional shift registers.  A special form of counter - the shift 
register counter, is also introduced.  
Serial In - Serial Out Shift Registers  
A basic four-bit shift register can be constructed using four D flip-flops, as shown below.  The operation of the circuit is 
as follows.  The register is first cleared, forcing all four outputs to zero.  The input data is then applied sequentially to 
the D input of the first flip-flop on the left (FF0).  During each clock pulse, one bit is transmitted from left to right. 
 Assume a data word to be 1001.  The least significant bit of the data has to be shifted through the register from FF0 to 
FF3.  
 
 
                                                               
 
In order to get the data out of the register, they must be shifted out serially.  This can be done destructively or non-
destructively.  For destructive readout, the original data is lost and at the end of the read cycle, all flip-flops are reset to 
zero.  
To avoid the loss of data, an arrangement for a non-destructive reading can be done by adding two AND gates, an OR 
gate and an inverter to the system.  The construction of this circuit is shown below. 
 
The data is loaded to the register when the control line is HIGH (ie WRITE).  The data can be shifted out of the register 
when the control line is LOW (ie READ) 
Serial In - Parallel Out Shift Registers  
For this kind of register, data bits are entered serially in the same manner as discussed in the last section.  The difference 
is the way in which the data bits are taken out of the register.  Once the data are stored, each bit appears on its respective 
output line, and all bits are available simultaneously.  A  construction of a four-bit serial in - parallel out register is 
shown below.  
 
A four-bit parallel in - serial out shift register is shown below.  The circuit uses D flip-flops and NAND gates for 
entering data (ie writing) to the register.  
 
                                                               
 
D0, D1, D2 and D3 are the parallel inputs, where D0 is the most significant bit and D3 is the least significant bit.  To 
write data in, the mode control line is taken to LOW and the data is clocked in.  The data can be shifted when the mode 
control line is HIGH as SHIFT is active high 
 Parallel In - Parallel Out Shift Registers  
For parallel in - parallel out shift registers, all data bits appear on the parallel outputs immediately following the 
simultaneous entry of the data bits.  The following circuit is a four-bit parallel in - parallel out shift register constructed 
by D flip-flops.  
 
The D's are the parallel inputs and the Q's are the parallel outputs.  Once the register is clocked, all the data at the D 
inputs appear at the corresponding Q outputs simultaneously.  
Bidirectional Shift Registers  
The registers discussed so far involved only right shift operations.  Each right shift operation has the effect of 
successively dividing the binary number by two.  If the operation is reversed (left shift), this has the effect of 
multiplying the number by two.  With suitable gating arrangement a serial shift register can perform both operations.  
A bidirectional, or reversible, shift register is one in which the data can be shift either left or right.  A four-bit 
bidirectional shift register using D flip-flops is shown below.  
 
Here a set of NAND gates are configured as OR gates to select data inputs from the right or left adjacent bistables, as 
selected by the LEFT/RIGHT control line.  
Page 4


                                                               
 
Register 
A register is a sequential circuit  with n + 1 (not counting the clock) inputs and n output. To each of the outputs 
corresponds an input. The first n inputs will be called x
0
 trough x
n-1
 and the last input will be called ld (for load). The n 
outputs will be called y
0
 trough y
n-1
.  
When the ld input is 0, the outputs are uneffected by any clock transition. When the ld input is 1, the x inputs are stored 
in the register at the next clock transition, making the y outputs into copies of the x inputs before the clock transition.  
We can explain this behavior more formally with a state table. As an example, let us take a register with n = 4. The left 
side of the state table contains 9 columns, labeled x0, x1, x2, x3, ld, y0, y1, y2, and y3. This means that the state table 
has 512 rows. We will therefore abbreviate it. Here it is:  
  ld x3 x2 x1 x0 y3 y2 y1 y0 | y3' y2' y1' y0' 
  ------------------------------------------- 
   0  --  --  --  -- c3 c2 c1 c0  | c3  c2  c1  c0 
   1 c3 c2  c1    c0 -- -- -- --  | c3  c2  c1  c0 
As you can see, when ld is 0 (the top half of the table), the right side of the table is a copy of the values of the old 
outputs, independently of the inputs. When ld is 1, the right side of the table is instead a copy of the values of the inputs, 
independently of the old values of the outputs.  
Registers play an important role in computers. Some of them are visible to the programmer, and are used to hold 
variable values for later use. Some of them are hidden to the programmer, and are used to hold values that are internal to 
the central processing unit, but nevertheless important.  
Shift registers 
Shift registers are a type of sequential logic circuit, mainly for storage of digital data.  They are a group of flip-flops 
connected in a chain so that the output from one flip-flop becomes the input of the next flip-flop.  Most of the registers 
possess no characteristic internal sequence of states.  All the flip-flops are driven by a common clock, and all are set or 
reset simultaneously.  
In this section, the basic types of shift registers are studied, such as Serial In - Serial Out, Serial In - Parallel Out, 
Parallel In - Serial Out, Parallel In - Parallel Out, and bidirectional shift registers.  A special form of counter - the shift 
register counter, is also introduced.  
Serial In - Serial Out Shift Registers  
A basic four-bit shift register can be constructed using four D flip-flops, as shown below.  The operation of the circuit is 
as follows.  The register is first cleared, forcing all four outputs to zero.  The input data is then applied sequentially to 
the D input of the first flip-flop on the left (FF0).  During each clock pulse, one bit is transmitted from left to right. 
 Assume a data word to be 1001.  The least significant bit of the data has to be shifted through the register from FF0 to 
FF3.  
 
 
                                                               
 
In order to get the data out of the register, they must be shifted out serially.  This can be done destructively or non-
destructively.  For destructive readout, the original data is lost and at the end of the read cycle, all flip-flops are reset to 
zero.  
To avoid the loss of data, an arrangement for a non-destructive reading can be done by adding two AND gates, an OR 
gate and an inverter to the system.  The construction of this circuit is shown below. 
 
The data is loaded to the register when the control line is HIGH (ie WRITE).  The data can be shifted out of the register 
when the control line is LOW (ie READ) 
Serial In - Parallel Out Shift Registers  
For this kind of register, data bits are entered serially in the same manner as discussed in the last section.  The difference 
is the way in which the data bits are taken out of the register.  Once the data are stored, each bit appears on its respective 
output line, and all bits are available simultaneously.  A  construction of a four-bit serial in - parallel out register is 
shown below.  
 
A four-bit parallel in - serial out shift register is shown below.  The circuit uses D flip-flops and NAND gates for 
entering data (ie writing) to the register.  
 
                                                               
 
D0, D1, D2 and D3 are the parallel inputs, where D0 is the most significant bit and D3 is the least significant bit.  To 
write data in, the mode control line is taken to LOW and the data is clocked in.  The data can be shifted when the mode 
control line is HIGH as SHIFT is active high 
 Parallel In - Parallel Out Shift Registers  
For parallel in - parallel out shift registers, all data bits appear on the parallel outputs immediately following the 
simultaneous entry of the data bits.  The following circuit is a four-bit parallel in - parallel out shift register constructed 
by D flip-flops.  
 
The D's are the parallel inputs and the Q's are the parallel outputs.  Once the register is clocked, all the data at the D 
inputs appear at the corresponding Q outputs simultaneously.  
Bidirectional Shift Registers  
The registers discussed so far involved only right shift operations.  Each right shift operation has the effect of 
successively dividing the binary number by two.  If the operation is reversed (left shift), this has the effect of 
multiplying the number by two.  With suitable gating arrangement a serial shift register can perform both operations.  
A bidirectional, or reversible, shift register is one in which the data can be shift either left or right.  A four-bit 
bidirectional shift register using D flip-flops is shown below.  
 
Here a set of NAND gates are configured as OR gates to select data inputs from the right or left adjacent bistables, as 
selected by the LEFT/RIGHT control line.  
                                                               
 
Shift Register Counters  
Two of the most common types of shift register counters are introduced here: the Ring counter and the Johnson counter. 
 They are basically shift registers with the serial outputs connected back to the serial inputs in order to produce 
particular sequences.  These registers are classified as counters because they exhibit a specified sequence of states.  
Ring Counters  
A ring counter is basically a circulating shift register in which the output of the most significant stage is fed back to the 
input of the least significant stage.  The following is a 4-bit ring counter constructed from D flip-flops.  The output of 
each stage is shifted into the next stage on the positive edge of a clock pulse.  If the CLEAR signal is high, all the flip-
flops except the first one FF0 are reset to 0.  FF0 is preset to 1 instead.  
 
Since the count sequence has 4 distinct states, the counter can be considered as a mod-4 counter.  Only 4 of the 
maximum 16 states are used, making ring counters very inefficient in terms of state usage.  But the major advantage of a 
ring counter over a binary counter is that it is self-decoding.  No extra decoding circuit is needed to determine what state 
the counter is in. 
 
 
 
Johnson Counters  
Johnson counters are a variation of standard ring counters, with the inverted output of the last stage fed back to the input 
of the first stage.  They are also known as twisted ring counters.  An n-stage Johnson counter yields a count sequence of 
length 2n, so it may be considered to be a mod-2n counter.  The circuit above shows a 4-bit Johnson counter.  The state 
sequence for the counter is given in the table  
 
Page 5


                                                               
 
Register 
A register is a sequential circuit  with n + 1 (not counting the clock) inputs and n output. To each of the outputs 
corresponds an input. The first n inputs will be called x
0
 trough x
n-1
 and the last input will be called ld (for load). The n 
outputs will be called y
0
 trough y
n-1
.  
When the ld input is 0, the outputs are uneffected by any clock transition. When the ld input is 1, the x inputs are stored 
in the register at the next clock transition, making the y outputs into copies of the x inputs before the clock transition.  
We can explain this behavior more formally with a state table. As an example, let us take a register with n = 4. The left 
side of the state table contains 9 columns, labeled x0, x1, x2, x3, ld, y0, y1, y2, and y3. This means that the state table 
has 512 rows. We will therefore abbreviate it. Here it is:  
  ld x3 x2 x1 x0 y3 y2 y1 y0 | y3' y2' y1' y0' 
  ------------------------------------------- 
   0  --  --  --  -- c3 c2 c1 c0  | c3  c2  c1  c0 
   1 c3 c2  c1    c0 -- -- -- --  | c3  c2  c1  c0 
As you can see, when ld is 0 (the top half of the table), the right side of the table is a copy of the values of the old 
outputs, independently of the inputs. When ld is 1, the right side of the table is instead a copy of the values of the inputs, 
independently of the old values of the outputs.  
Registers play an important role in computers. Some of them are visible to the programmer, and are used to hold 
variable values for later use. Some of them are hidden to the programmer, and are used to hold values that are internal to 
the central processing unit, but nevertheless important.  
Shift registers 
Shift registers are a type of sequential logic circuit, mainly for storage of digital data.  They are a group of flip-flops 
connected in a chain so that the output from one flip-flop becomes the input of the next flip-flop.  Most of the registers 
possess no characteristic internal sequence of states.  All the flip-flops are driven by a common clock, and all are set or 
reset simultaneously.  
In this section, the basic types of shift registers are studied, such as Serial In - Serial Out, Serial In - Parallel Out, 
Parallel In - Serial Out, Parallel In - Parallel Out, and bidirectional shift registers.  A special form of counter - the shift 
register counter, is also introduced.  
Serial In - Serial Out Shift Registers  
A basic four-bit shift register can be constructed using four D flip-flops, as shown below.  The operation of the circuit is 
as follows.  The register is first cleared, forcing all four outputs to zero.  The input data is then applied sequentially to 
the D input of the first flip-flop on the left (FF0).  During each clock pulse, one bit is transmitted from left to right. 
 Assume a data word to be 1001.  The least significant bit of the data has to be shifted through the register from FF0 to 
FF3.  
 
 
                                                               
 
In order to get the data out of the register, they must be shifted out serially.  This can be done destructively or non-
destructively.  For destructive readout, the original data is lost and at the end of the read cycle, all flip-flops are reset to 
zero.  
To avoid the loss of data, an arrangement for a non-destructive reading can be done by adding two AND gates, an OR 
gate and an inverter to the system.  The construction of this circuit is shown below. 
 
The data is loaded to the register when the control line is HIGH (ie WRITE).  The data can be shifted out of the register 
when the control line is LOW (ie READ) 
Serial In - Parallel Out Shift Registers  
For this kind of register, data bits are entered serially in the same manner as discussed in the last section.  The difference 
is the way in which the data bits are taken out of the register.  Once the data are stored, each bit appears on its respective 
output line, and all bits are available simultaneously.  A  construction of a four-bit serial in - parallel out register is 
shown below.  
 
A four-bit parallel in - serial out shift register is shown below.  The circuit uses D flip-flops and NAND gates for 
entering data (ie writing) to the register.  
 
                                                               
 
D0, D1, D2 and D3 are the parallel inputs, where D0 is the most significant bit and D3 is the least significant bit.  To 
write data in, the mode control line is taken to LOW and the data is clocked in.  The data can be shifted when the mode 
control line is HIGH as SHIFT is active high 
 Parallel In - Parallel Out Shift Registers  
For parallel in - parallel out shift registers, all data bits appear on the parallel outputs immediately following the 
simultaneous entry of the data bits.  The following circuit is a four-bit parallel in - parallel out shift register constructed 
by D flip-flops.  
 
The D's are the parallel inputs and the Q's are the parallel outputs.  Once the register is clocked, all the data at the D 
inputs appear at the corresponding Q outputs simultaneously.  
Bidirectional Shift Registers  
The registers discussed so far involved only right shift operations.  Each right shift operation has the effect of 
successively dividing the binary number by two.  If the operation is reversed (left shift), this has the effect of 
multiplying the number by two.  With suitable gating arrangement a serial shift register can perform both operations.  
A bidirectional, or reversible, shift register is one in which the data can be shift either left or right.  A four-bit 
bidirectional shift register using D flip-flops is shown below.  
 
Here a set of NAND gates are configured as OR gates to select data inputs from the right or left adjacent bistables, as 
selected by the LEFT/RIGHT control line.  
                                                               
 
Shift Register Counters  
Two of the most common types of shift register counters are introduced here: the Ring counter and the Johnson counter. 
 They are basically shift registers with the serial outputs connected back to the serial inputs in order to produce 
particular sequences.  These registers are classified as counters because they exhibit a specified sequence of states.  
Ring Counters  
A ring counter is basically a circulating shift register in which the output of the most significant stage is fed back to the 
input of the least significant stage.  The following is a 4-bit ring counter constructed from D flip-flops.  The output of 
each stage is shifted into the next stage on the positive edge of a clock pulse.  If the CLEAR signal is high, all the flip-
flops except the first one FF0 are reset to 0.  FF0 is preset to 1 instead.  
 
Since the count sequence has 4 distinct states, the counter can be considered as a mod-4 counter.  Only 4 of the 
maximum 16 states are used, making ring counters very inefficient in terms of state usage.  But the major advantage of a 
ring counter over a binary counter is that it is self-decoding.  No extra decoding circuit is needed to determine what state 
the counter is in. 
 
 
 
Johnson Counters  
Johnson counters are a variation of standard ring counters, with the inverted output of the last stage fed back to the input 
of the first stage.  They are also known as twisted ring counters.  An n-stage Johnson counter yields a count sequence of 
length 2n, so it may be considered to be a mod-2n counter.  The circuit above shows a 4-bit Johnson counter.  The state 
sequence for the counter is given in the table  
 
                                                               
 
 
 
 
Again, the apparent disadvantage of this counter is that the maximum available states are not fully utilized.  Only eight 
of the sixteen states are being used.  
Counters 
A sequential circuit that goes through a prescribed sequence of states upon the application of input pulses is called a 
counter. The input pulses, called count pulses, may be clock pulses. In a counter, the sequence of states may follow a 
binary count or any other sequence of states. Counters are found in almost all equipment containing digital logic. They 
are used for counting the number of occurrences of an even and are useful for generating timing sequences to control 
operations in a digital system. 
A counter is a sequential circuit with 0 inputs and n outputs. Thus, the value after the clock transition depends only on 
old values of the outputs. For a counter, the values of the outputs are interpreted as a sequence of binary digits (see the 
section on binary arithmetic).  
We shall call the outputs o0, o1, ..., on-1. The value of the outputs for the counter after a clock transition is a binary 
number which is one plus the binary number of the outputs before the clock transition.  
We can explain this behavior more formally with a state table. As an example, let us take a counter with n = 4. The left 
side of the state table contains 4 columns, labeled o0, o1, o2, and o3. This means that the state table has 16 rows. Here it 
is in full:  
 
  o3 o2 o1 o0 | o3' o2' o1' o0' 
  ----------------------------- 
   0  0  0  0 |  0   0   0   1 
   0  0  0  1 |  0   0   1   0 
   0  0  1  0 |  0   0   1   1 
   0  0  1  1 |  0   1   0   0 
   0  1  0  0 |  0   1   0   1 
   0  1  0  1 |  0   1   1   0 
   0  1  1  0 |  0   1   1   1 
   0  1  1  1 |  1   0   0   0 
   1  0  0  0 |  1   0   0   1 
   1  0  0  1 |  1   0   1   0 
   1  0  1  0 |  1   0   1   1 
   1  0  1  1 |  1   1   0   0 
   1  1  0  0 |  1   1   0   1 
   1  1  0  1 |  1   1   1   0 
   1  1  1  0 |  1   1   1   1 
   1  1  1  1 |  0   0   0   0 
As you can see, the right hand side of the table is always one plus the value of the left hand side of the table, except for 
the last line, where the value is 0 for all the outputs. We say that the counter wraps around.