In a negative edge triggered J-K flip-flop, in order to have the output Q state 0, 0 and1 in the next three successive clock pulses, the J-K input states required would be respectively
• a)
00, 00 and 10
• b)
00, 01 and 11
• c)
00, 10 and 11
• d)
01, 10 and 11

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