CMOS gates at the transistor level Boolean algebra Combinational-circuit analysis Electronics and Communication Engineering (ECE) Notes | EduRev

Electronics and Communication Engineering (ECE) : CMOS gates at the transistor level Boolean algebra Combinational-circuit analysis Electronics and Communication Engineering (ECE) Notes | EduRev

 Page 1


Modified from John Wakerly 
 Lecture #2 and #3 
CMOS gates at the transistor level 
Boolean algebra 
Combinational-circuit analysis 
Page 2


Modified from John Wakerly 
 Lecture #2 and #3 
CMOS gates at the transistor level 
Boolean algebra 
Combinational-circuit analysis 
CMOS NAND Gates 
• Use 2n transistors for n-input gate 
 
Page 3


Modified from John Wakerly 
 Lecture #2 and #3 
CMOS gates at the transistor level 
Boolean algebra 
Combinational-circuit analysis 
CMOS NAND Gates 
• Use 2n transistors for n-input gate 
 
• CMOS NAND -- switch model 
Page 4


Modified from John Wakerly 
 Lecture #2 and #3 
CMOS gates at the transistor level 
Boolean algebra 
Combinational-circuit analysis 
CMOS NAND Gates 
• Use 2n transistors for n-input gate 
 
• CMOS NAND -- switch model 
• CMOS NAND -- more inputs (3) 
Page 5


Modified from John Wakerly 
 Lecture #2 and #3 
CMOS gates at the transistor level 
Boolean algebra 
Combinational-circuit analysis 
CMOS NAND Gates 
• Use 2n transistors for n-input gate 
 
• CMOS NAND -- switch model 
• CMOS NAND -- more inputs (3) 
• Inherent inversion.   
• Non-inverting buffer: 
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