Chapter 5 - Input, Output Notes | EduRev

: Chapter 5 - Input, Output Notes | EduRev

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Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639
MODERN OPERATING SYSTEMS
Third Edition
ANDREW S. TANENBAUM
Chapter 5
Input/Output
Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639
Slide 1 (Notes) 
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1
1
Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639
MODERN OPERATING SYSTEMS
Third Edition
ANDREW S. TANENBAUM
Chapter 5
Input/Output
Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639
Slide 1 (Notes) 
2
Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639
Figure 5-1. Some typical 
device, network, and 
bus data rates.
I/O Devices
Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639
Slide 2 (Notes) 
Page 3


1
1
Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639
MODERN OPERATING SYSTEMS
Third Edition
ANDREW S. TANENBAUM
Chapter 5
Input/Output
Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639
Slide 1 (Notes) 
2
Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639
Figure 5-1. Some typical 
device, network, and 
bus data rates.
I/O Devices
Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639
Slide 2 (Notes) 
3
Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639
Figure 5-2. (a) Separate I/O and memory space. 
(b) Memory-mapped I/O. (c) Hybrid.
Memory-Mapped I/O (1)
Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639
Slide 3 (Notes) 
Page 4


1
1
Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639
MODERN OPERATING SYSTEMS
Third Edition
ANDREW S. TANENBAUM
Chapter 5
Input/Output
Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639
Slide 1 (Notes) 
2
Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639
Figure 5-1. Some typical 
device, network, and 
bus data rates.
I/O Devices
Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639
Slide 2 (Notes) 
3
Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639
Figure 5-2. (a) Separate I/O and memory space. 
(b) Memory-mapped I/O. (c) Hybrid.
Memory-Mapped I/O (1)
Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639
Slide 3 (Notes) 
4
Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639
Figure 5-3. (a) A single-bus architecture. 
(b) A dual-bus memory architecture.
Memory-Mapped I/O (2)
Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639
Slide 4 (Notes) 
Page 5


1
1
Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639
MODERN OPERATING SYSTEMS
Third Edition
ANDREW S. TANENBAUM
Chapter 5
Input/Output
Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639
Slide 1 (Notes) 
2
Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639
Figure 5-1. Some typical 
device, network, and 
bus data rates.
I/O Devices
Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639
Slide 2 (Notes) 
3
Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639
Figure 5-2. (a) Separate I/O and memory space. 
(b) Memory-mapped I/O. (c) Hybrid.
Memory-Mapped I/O (1)
Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639
Slide 3 (Notes) 
4
Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639
Figure 5-3. (a) A single-bus architecture. 
(b) A dual-bus memory architecture.
Memory-Mapped I/O (2)
Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639
Slide 4 (Notes) 
5
Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639
Figure 5-4. Operation of a DMA transfer.
Direct Memory Access (DMA)
Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639
Slide 5 (Notes) 
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