Chapter 6Part BSemiconductor Memories & Programmable Logic Notes | EduRev

Created by: Sahil Setia

: Chapter 6Part BSemiconductor Memories & Programmable Logic Notes | EduRev

 Page 1


Chapter 6
Part B
Semiconductor Memories & 
Programmable Logic 
Chapter 11,12 of R.P Jain
Page 2


Chapter 6
Part B
Semiconductor Memories & 
Programmable Logic 
Chapter 11,12 of R.P Jain
Syllabus : Part B
Semiconductor Memories & Programmable Logic
? ROM, PROM, EPROM, EEPROM; 
? RAM: 
? Static RAM, 
? Typical Memory Cell, 
? Memory Organisation, 
? Dynamic RAM cell, 
? Reading, & Writing Operation in RAM,  
? PLA, PAL & FPGA.
Page 3


Chapter 6
Part B
Semiconductor Memories & 
Programmable Logic 
Chapter 11,12 of R.P Jain
Syllabus : Part B
Semiconductor Memories & Programmable Logic
? ROM, PROM, EPROM, EEPROM; 
? RAM: 
? Static RAM, 
? Typical Memory Cell, 
? Memory Organisation, 
? Dynamic RAM cell, 
? Reading, & Writing Operation in RAM,  
? PLA, PAL & FPGA.
Memory
• Memory: storage element
• Memory Types
– ROM : Read-only memory
– RAM : Read-Write memory
• Four commonly used memories:
– ROM
– Flash (EEPROM)
– Static RAM (SRAM)
– Dynamic RAM (DRAM)
Page 4


Chapter 6
Part B
Semiconductor Memories & 
Programmable Logic 
Chapter 11,12 of R.P Jain
Syllabus : Part B
Semiconductor Memories & Programmable Logic
? ROM, PROM, EPROM, EEPROM; 
? RAM: 
? Static RAM, 
? Typical Memory Cell, 
? Memory Organisation, 
? Dynamic RAM cell, 
? Reading, & Writing Operation in RAM,  
? PLA, PAL & FPGA.
Memory
• Memory: storage element
• Memory Types
– ROM : Read-only memory
– RAM : Read-Write memory
• Four commonly used memories:
– ROM
– Flash (EEPROM)
– Static RAM (SRAM)
– Dynamic RAM (DRAM)
Memory Chips
• The number of address pins is related to the number of memory 
locations . 
– Memory location = 2 (address lines)
– 10 address lines give 1KB (= 2
10
)
• The data pins are typically bi-directional in read-write memories. 
– The number of data pins is related to the size of the memory 
location . 
– For example, an 8-bit wide (byte-wide) memory device has 8
data pins. 
• Each memory device has at least one chip select ( CS ) or chip 
enable ( CE ) or select ( S ) pin that enables the memory device. 
– This enables read and/or write operations. 
Page 5


Chapter 6
Part B
Semiconductor Memories & 
Programmable Logic 
Chapter 11,12 of R.P Jain
Syllabus : Part B
Semiconductor Memories & Programmable Logic
? ROM, PROM, EPROM, EEPROM; 
? RAM: 
? Static RAM, 
? Typical Memory Cell, 
? Memory Organisation, 
? Dynamic RAM cell, 
? Reading, & Writing Operation in RAM,  
? PLA, PAL & FPGA.
Memory
• Memory: storage element
• Memory Types
– ROM : Read-only memory
– RAM : Read-Write memory
• Four commonly used memories:
– ROM
– Flash (EEPROM)
– Static RAM (SRAM)
– Dynamic RAM (DRAM)
Memory Chips
• The number of address pins is related to the number of memory 
locations . 
– Memory location = 2 (address lines)
– 10 address lines give 1KB (= 2
10
)
• The data pins are typically bi-directional in read-write memories. 
– The number of data pins is related to the size of the memory 
location . 
– For example, an 8-bit wide (byte-wide) memory device has 8
data pins. 
• Each memory device has at least one chip select ( CS ) or chip 
enable ( CE ) or select ( S ) pin that enables the memory device. 
– This enables read and/or write operations. 
ROM
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