Detailed Notes: MOSFET | Analog Circuits - Electronics and Communication Engineering (ECE) PDF Download

 Page 1


MODULE-II 
MOSFET CIRCUITS 
 
MOSFET structure and I-V characteristics. MOSFET as a switch. small signal equivalent circuits - 
gain, input and output impedances, small-signal model and common-source, common-gate and 
common-drain amplifiers, trans conductance, high frequency equivalent circuit. 
 
INTRODUCTION 
? The Field effect transistor is abbreviated as FET , it is an another semiconductor device like a BJT  
which can be used as an amplifier or  switch. 
? The Field effect transistor is a voltage operated device. Whereas Bipolar junction transistor is a 
current controlled device. Unlike BJT a FET requires virtually no input current. 
? This gives it an extremely high input resistance , which is its most important advantage over a bipolar 
transistor. 
? FET is also a three terminal device, labeled  as source, drain and gate. 
? The source can be viewed as BJT’s emitter, the drain as collector, and the gate as the counter part of 
the base. 
? The material that connects the source to drain is referred to as the channel.  
 
? FET operation depends only on the flow of majority carriers ,therefore they are called uni polar  
devices. BJT operation depends on both minority and majority carriers. 
? As FET has conduction through only majority carriers it is less noisy than BJT. 
? FETs are much easier to fabricate and are particularly suitable for ICs because they occupy less space 
than BJTs. 
? FET amplifiers have low gain bandwidth product due to the junction capacitive effects and produce 
more signal distortion except for small signal operation. 
? The performance of FET is relatively unaffected by ambient temperature changes. As it has  a 
negative temperature coefficient at high current levels, it prevents the FET from thermal breakdown. 
The BJT has a positive temperature coefficient at high current levels which leads to thermal 
breakdown. 
6.2 CLASSIFICATION OF FET: 
There are two major categories of field effect transistors: 
1. Junction Field Effect Transistors 
2. MOSFETs 
These are further sub divided in to P- channel and N-channel devices. 
MOSFETs are further classified in to two types Depletion MOSFETs and Enhancement. MOSFETs  
When the channel is of N-type the JFET is referred to as an N-channel JFET, when the channel is of P-
type the JFET is referred to as P-channel JFET. 
  The schematic symbols for the P-channel and N-channel JFETs are shown in the figure.  
Page 2


MODULE-II 
MOSFET CIRCUITS 
 
MOSFET structure and I-V characteristics. MOSFET as a switch. small signal equivalent circuits - 
gain, input and output impedances, small-signal model and common-source, common-gate and 
common-drain amplifiers, trans conductance, high frequency equivalent circuit. 
 
INTRODUCTION 
? The Field effect transistor is abbreviated as FET , it is an another semiconductor device like a BJT  
which can be used as an amplifier or  switch. 
? The Field effect transistor is a voltage operated device. Whereas Bipolar junction transistor is a 
current controlled device. Unlike BJT a FET requires virtually no input current. 
? This gives it an extremely high input resistance , which is its most important advantage over a bipolar 
transistor. 
? FET is also a three terminal device, labeled  as source, drain and gate. 
? The source can be viewed as BJT’s emitter, the drain as collector, and the gate as the counter part of 
the base. 
? The material that connects the source to drain is referred to as the channel.  
 
? FET operation depends only on the flow of majority carriers ,therefore they are called uni polar  
devices. BJT operation depends on both minority and majority carriers. 
? As FET has conduction through only majority carriers it is less noisy than BJT. 
? FETs are much easier to fabricate and are particularly suitable for ICs because they occupy less space 
than BJTs. 
? FET amplifiers have low gain bandwidth product due to the junction capacitive effects and produce 
more signal distortion except for small signal operation. 
? The performance of FET is relatively unaffected by ambient temperature changes. As it has  a 
negative temperature coefficient at high current levels, it prevents the FET from thermal breakdown. 
The BJT has a positive temperature coefficient at high current levels which leads to thermal 
breakdown. 
6.2 CLASSIFICATION OF FET: 
There are two major categories of field effect transistors: 
1. Junction Field Effect Transistors 
2. MOSFETs 
These are further sub divided in to P- channel and N-channel devices. 
MOSFETs are further classified in to two types Depletion MOSFETs and Enhancement. MOSFETs  
When the channel is of N-type the JFET is referred to as an N-channel JFET, when the channel is of P-
type the JFET is referred to as P-channel JFET. 
  The schematic symbols for the P-channel and N-channel JFETs are shown in the figure.  
 
 
6.3 CONSTRUCTION AND OPERATION OF N- CHANNEL FET 
 
If the gate is an N-type material, the channel must be a P-type material. 
CONSTRUCTION OF N-CHANNEL JFET 
 
 
   
A piece of N- type material, referred to as channel has two smaller pieces of P-type material attached to 
its sides, forming PN junctions. The channel ends are designated as the drain and source . And the two 
pieces of P-type material are connected together and their terminal is called the gate. Since this channel is 
in the N-type bar, the FET is known as N-channel JFET. 
 
OPERATION OF N-CHANNEL JFET:-   
The overall operation of the JFET is based on varying the width of the channel to control the drain current.  
   A piece of N type material referred to as the channel, has two smaller pieces of P type 
material attached to its sites, farming PN –Junctions. The channel’s ends are designated the drain and the 
source. And the two pieces of P type material are connected together and their terminal is called the gate. 
With the gate terminal not connected and the potential applied positive at the drain negative at the source a 
drain current Id flows. When the gate is biased negative with respective to the source the PN junctions are 
reverse biased and depletion regions are formed. The channel is more lightly doped than the P type gate 
blocks, so the depletion regions penetrate deeply into the channel. Since depletion region is a region depleted 
of charge carriers it behaves as an Insulator. The result is that the channel is narrowed. Its resistance is 
increased and Id is reduced. When the negative gate bias voltage is further increased, the depletion regions 
meet at the center and Id is cut off completely. 
There are two ways to control the channel width 
? By varying the value of Vgs  
? And by Varying the value of Vds  holding Vgs constant 
 
 
 
 
1 By varying the value of Vgs :-   
Page 3


MODULE-II 
MOSFET CIRCUITS 
 
MOSFET structure and I-V characteristics. MOSFET as a switch. small signal equivalent circuits - 
gain, input and output impedances, small-signal model and common-source, common-gate and 
common-drain amplifiers, trans conductance, high frequency equivalent circuit. 
 
INTRODUCTION 
? The Field effect transistor is abbreviated as FET , it is an another semiconductor device like a BJT  
which can be used as an amplifier or  switch. 
? The Field effect transistor is a voltage operated device. Whereas Bipolar junction transistor is a 
current controlled device. Unlike BJT a FET requires virtually no input current. 
? This gives it an extremely high input resistance , which is its most important advantage over a bipolar 
transistor. 
? FET is also a three terminal device, labeled  as source, drain and gate. 
? The source can be viewed as BJT’s emitter, the drain as collector, and the gate as the counter part of 
the base. 
? The material that connects the source to drain is referred to as the channel.  
 
? FET operation depends only on the flow of majority carriers ,therefore they are called uni polar  
devices. BJT operation depends on both minority and majority carriers. 
? As FET has conduction through only majority carriers it is less noisy than BJT. 
? FETs are much easier to fabricate and are particularly suitable for ICs because they occupy less space 
than BJTs. 
? FET amplifiers have low gain bandwidth product due to the junction capacitive effects and produce 
more signal distortion except for small signal operation. 
? The performance of FET is relatively unaffected by ambient temperature changes. As it has  a 
negative temperature coefficient at high current levels, it prevents the FET from thermal breakdown. 
The BJT has a positive temperature coefficient at high current levels which leads to thermal 
breakdown. 
6.2 CLASSIFICATION OF FET: 
There are two major categories of field effect transistors: 
1. Junction Field Effect Transistors 
2. MOSFETs 
These are further sub divided in to P- channel and N-channel devices. 
MOSFETs are further classified in to two types Depletion MOSFETs and Enhancement. MOSFETs  
When the channel is of N-type the JFET is referred to as an N-channel JFET, when the channel is of P-
type the JFET is referred to as P-channel JFET. 
  The schematic symbols for the P-channel and N-channel JFETs are shown in the figure.  
 
 
6.3 CONSTRUCTION AND OPERATION OF N- CHANNEL FET 
 
If the gate is an N-type material, the channel must be a P-type material. 
CONSTRUCTION OF N-CHANNEL JFET 
 
 
   
A piece of N- type material, referred to as channel has two smaller pieces of P-type material attached to 
its sides, forming PN junctions. The channel ends are designated as the drain and source . And the two 
pieces of P-type material are connected together and their terminal is called the gate. Since this channel is 
in the N-type bar, the FET is known as N-channel JFET. 
 
OPERATION OF N-CHANNEL JFET:-   
The overall operation of the JFET is based on varying the width of the channel to control the drain current.  
   A piece of N type material referred to as the channel, has two smaller pieces of P type 
material attached to its sites, farming PN –Junctions. The channel’s ends are designated the drain and the 
source. And the two pieces of P type material are connected together and their terminal is called the gate. 
With the gate terminal not connected and the potential applied positive at the drain negative at the source a 
drain current Id flows. When the gate is biased negative with respective to the source the PN junctions are 
reverse biased and depletion regions are formed. The channel is more lightly doped than the P type gate 
blocks, so the depletion regions penetrate deeply into the channel. Since depletion region is a region depleted 
of charge carriers it behaves as an Insulator. The result is that the channel is narrowed. Its resistance is 
increased and Id is reduced. When the negative gate bias voltage is further increased, the depletion regions 
meet at the center and Id is cut off completely. 
There are two ways to control the channel width 
? By varying the value of Vgs  
? And by Varying the value of Vds  holding Vgs constant 
 
 
 
 
1 By varying the value of Vgs :-   
    We can vary the width of the channel and in turn vary the amount of drain current. 
This can be done by varying the value of Vgs. This point is illustrated in the fig  below. Here we are 
dealing with N channel FET. So channel is of N type and gate is of P type that constitutes a PN junction. 
This PN junction is always reverse biased in JFET operation .The reverse bias is applied by a battery 
voltage Vgs connected between the gate and the source terminal i.e positive terminal of the battery is 
connected to the source and negative terminal to gate. 
 
 
 
1) When a PN junction is reverse biased the electrons and holes diffuse across junction by leaving 
immobile ions on the N and P sides , the region containing these immobile ions  is known as 
depletion regions. 
2) If both P and N regions are heavily doped then the depletion region extends symmetrically on both 
sides.  
3) But in N channel FET P region is heavily doped than N type thus depletion region extends more in N 
region than P region. 
4) So when no Vds is applied the depletion region is symmetrical and the conductivity becomes Zero. 
Since there are no mobile carriers in the junction. 
5) As the reverse bias voltage is increases the thickness of the depletion region also increases.  i.e. the 
effective channel width decreases . 
6) By varying the value of Vgs we can vary the width of the channel. 
 
2 Varying the value of Vds  holding Vgs constant :- 
? When no voltage is applied to the gate i.e. Vgs=0 , Vds is applied between source and drain the 
electrons will flow from source to drain through the channel constituting drain current Id . 
? With Vgs= 0 for Id= 0 the channel between the gate junctions is entirely open .In response to a small 
applied voltage Vds , the entire bar acts as a simple semi conductor resistor and the current Id 
increases linearly with Vds . 
?       The channel resistances are represented as rd and rs as shown in the fig. 
 
  
 
 
 
 
? This increasing drain current Id produces a voltage drop across rd which reverse biases the gate to 
source junction,(rd> rs) .Thus the depletion region is formed which is not symmetrical . 
Page 4


MODULE-II 
MOSFET CIRCUITS 
 
MOSFET structure and I-V characteristics. MOSFET as a switch. small signal equivalent circuits - 
gain, input and output impedances, small-signal model and common-source, common-gate and 
common-drain amplifiers, trans conductance, high frequency equivalent circuit. 
 
INTRODUCTION 
? The Field effect transistor is abbreviated as FET , it is an another semiconductor device like a BJT  
which can be used as an amplifier or  switch. 
? The Field effect transistor is a voltage operated device. Whereas Bipolar junction transistor is a 
current controlled device. Unlike BJT a FET requires virtually no input current. 
? This gives it an extremely high input resistance , which is its most important advantage over a bipolar 
transistor. 
? FET is also a three terminal device, labeled  as source, drain and gate. 
? The source can be viewed as BJT’s emitter, the drain as collector, and the gate as the counter part of 
the base. 
? The material that connects the source to drain is referred to as the channel.  
 
? FET operation depends only on the flow of majority carriers ,therefore they are called uni polar  
devices. BJT operation depends on both minority and majority carriers. 
? As FET has conduction through only majority carriers it is less noisy than BJT. 
? FETs are much easier to fabricate and are particularly suitable for ICs because they occupy less space 
than BJTs. 
? FET amplifiers have low gain bandwidth product due to the junction capacitive effects and produce 
more signal distortion except for small signal operation. 
? The performance of FET is relatively unaffected by ambient temperature changes. As it has  a 
negative temperature coefficient at high current levels, it prevents the FET from thermal breakdown. 
The BJT has a positive temperature coefficient at high current levels which leads to thermal 
breakdown. 
6.2 CLASSIFICATION OF FET: 
There are two major categories of field effect transistors: 
1. Junction Field Effect Transistors 
2. MOSFETs 
These are further sub divided in to P- channel and N-channel devices. 
MOSFETs are further classified in to two types Depletion MOSFETs and Enhancement. MOSFETs  
When the channel is of N-type the JFET is referred to as an N-channel JFET, when the channel is of P-
type the JFET is referred to as P-channel JFET. 
  The schematic symbols for the P-channel and N-channel JFETs are shown in the figure.  
 
 
6.3 CONSTRUCTION AND OPERATION OF N- CHANNEL FET 
 
If the gate is an N-type material, the channel must be a P-type material. 
CONSTRUCTION OF N-CHANNEL JFET 
 
 
   
A piece of N- type material, referred to as channel has two smaller pieces of P-type material attached to 
its sides, forming PN junctions. The channel ends are designated as the drain and source . And the two 
pieces of P-type material are connected together and their terminal is called the gate. Since this channel is 
in the N-type bar, the FET is known as N-channel JFET. 
 
OPERATION OF N-CHANNEL JFET:-   
The overall operation of the JFET is based on varying the width of the channel to control the drain current.  
   A piece of N type material referred to as the channel, has two smaller pieces of P type 
material attached to its sites, farming PN –Junctions. The channel’s ends are designated the drain and the 
source. And the two pieces of P type material are connected together and their terminal is called the gate. 
With the gate terminal not connected and the potential applied positive at the drain negative at the source a 
drain current Id flows. When the gate is biased negative with respective to the source the PN junctions are 
reverse biased and depletion regions are formed. The channel is more lightly doped than the P type gate 
blocks, so the depletion regions penetrate deeply into the channel. Since depletion region is a region depleted 
of charge carriers it behaves as an Insulator. The result is that the channel is narrowed. Its resistance is 
increased and Id is reduced. When the negative gate bias voltage is further increased, the depletion regions 
meet at the center and Id is cut off completely. 
There are two ways to control the channel width 
? By varying the value of Vgs  
? And by Varying the value of Vds  holding Vgs constant 
 
 
 
 
1 By varying the value of Vgs :-   
    We can vary the width of the channel and in turn vary the amount of drain current. 
This can be done by varying the value of Vgs. This point is illustrated in the fig  below. Here we are 
dealing with N channel FET. So channel is of N type and gate is of P type that constitutes a PN junction. 
This PN junction is always reverse biased in JFET operation .The reverse bias is applied by a battery 
voltage Vgs connected between the gate and the source terminal i.e positive terminal of the battery is 
connected to the source and negative terminal to gate. 
 
 
 
1) When a PN junction is reverse biased the electrons and holes diffuse across junction by leaving 
immobile ions on the N and P sides , the region containing these immobile ions  is known as 
depletion regions. 
2) If both P and N regions are heavily doped then the depletion region extends symmetrically on both 
sides.  
3) But in N channel FET P region is heavily doped than N type thus depletion region extends more in N 
region than P region. 
4) So when no Vds is applied the depletion region is symmetrical and the conductivity becomes Zero. 
Since there are no mobile carriers in the junction. 
5) As the reverse bias voltage is increases the thickness of the depletion region also increases.  i.e. the 
effective channel width decreases . 
6) By varying the value of Vgs we can vary the width of the channel. 
 
2 Varying the value of Vds  holding Vgs constant :- 
? When no voltage is applied to the gate i.e. Vgs=0 , Vds is applied between source and drain the 
electrons will flow from source to drain through the channel constituting drain current Id . 
? With Vgs= 0 for Id= 0 the channel between the gate junctions is entirely open .In response to a small 
applied voltage Vds , the entire bar acts as a simple semi conductor resistor and the current Id 
increases linearly with Vds . 
?       The channel resistances are represented as rd and rs as shown in the fig. 
 
  
 
 
 
 
? This increasing drain current Id produces a voltage drop across rd which reverse biases the gate to 
source junction,(rd> rs) .Thus the depletion region is formed which is not symmetrical . 
? The depletion region i.e. developed penetrates deeper in to the channel near drain and less towards 
source because Vrd >> Vrs. So reverse bias is higher near drain than at source. 
? As a result growing depletion region reduces the effective width of the channel. Eventually a voltage 
Vds is reached at which the channel is pinched off. This is the voltage where the current Id begins to 
level off and approach a constant value. 
?  So, by varying the value of Vds we can vary the width of the channel holding Vgs constant. 
  
When both Vgs and Vds is applied:- 
 
 
          It is of course in principle not possible for the channel to close Completely and there by reduce the 
current Id to Zero for,  if such indeed, could be the case the gate voltage Vgs is applied in the direction to 
provide additional reverse bias  
? When voltage is applied between the drain and source with a battery Vdd, the electrons flow from 
source to drain through the narrow channel existing between the depletion regions. This constitutes 
the drain current Id, its conventional direction is from drain to source. 
? The value of drain current is maximum  when no external voltage is applied between gate and 
source and is designated by Idss. 
 
 
? When Vgs is increased beyond Zero the depletion regions are widened. This reduces the effective 
width of the channel and therefore controls the flow of drain current through the channel. 
? When Vgs is further increased a stage is reached at which to depletion regions touch each other that 
means the entire channel is closed with depletion region. This reduces the drain current to Zero.  
 
6.4 CHARACTERISTICS OF N-CHANNEL JFET :- 
 The family of curves that shows the relation between current and voltage are known as characteristic 
curves. 
 There are two important characteristics of a JFET. 
1) Drain or VI Characteristics 
2) Transfer characteristics 
 
 
? Drain Characteristics:-  
    Drain characteristics shows the relation between the drain to source voltage Vds and 
Page 5


MODULE-II 
MOSFET CIRCUITS 
 
MOSFET structure and I-V characteristics. MOSFET as a switch. small signal equivalent circuits - 
gain, input and output impedances, small-signal model and common-source, common-gate and 
common-drain amplifiers, trans conductance, high frequency equivalent circuit. 
 
INTRODUCTION 
? The Field effect transistor is abbreviated as FET , it is an another semiconductor device like a BJT  
which can be used as an amplifier or  switch. 
? The Field effect transistor is a voltage operated device. Whereas Bipolar junction transistor is a 
current controlled device. Unlike BJT a FET requires virtually no input current. 
? This gives it an extremely high input resistance , which is its most important advantage over a bipolar 
transistor. 
? FET is also a three terminal device, labeled  as source, drain and gate. 
? The source can be viewed as BJT’s emitter, the drain as collector, and the gate as the counter part of 
the base. 
? The material that connects the source to drain is referred to as the channel.  
 
? FET operation depends only on the flow of majority carriers ,therefore they are called uni polar  
devices. BJT operation depends on both minority and majority carriers. 
? As FET has conduction through only majority carriers it is less noisy than BJT. 
? FETs are much easier to fabricate and are particularly suitable for ICs because they occupy less space 
than BJTs. 
? FET amplifiers have low gain bandwidth product due to the junction capacitive effects and produce 
more signal distortion except for small signal operation. 
? The performance of FET is relatively unaffected by ambient temperature changes. As it has  a 
negative temperature coefficient at high current levels, it prevents the FET from thermal breakdown. 
The BJT has a positive temperature coefficient at high current levels which leads to thermal 
breakdown. 
6.2 CLASSIFICATION OF FET: 
There are two major categories of field effect transistors: 
1. Junction Field Effect Transistors 
2. MOSFETs 
These are further sub divided in to P- channel and N-channel devices. 
MOSFETs are further classified in to two types Depletion MOSFETs and Enhancement. MOSFETs  
When the channel is of N-type the JFET is referred to as an N-channel JFET, when the channel is of P-
type the JFET is referred to as P-channel JFET. 
  The schematic symbols for the P-channel and N-channel JFETs are shown in the figure.  
 
 
6.3 CONSTRUCTION AND OPERATION OF N- CHANNEL FET 
 
If the gate is an N-type material, the channel must be a P-type material. 
CONSTRUCTION OF N-CHANNEL JFET 
 
 
   
A piece of N- type material, referred to as channel has two smaller pieces of P-type material attached to 
its sides, forming PN junctions. The channel ends are designated as the drain and source . And the two 
pieces of P-type material are connected together and their terminal is called the gate. Since this channel is 
in the N-type bar, the FET is known as N-channel JFET. 
 
OPERATION OF N-CHANNEL JFET:-   
The overall operation of the JFET is based on varying the width of the channel to control the drain current.  
   A piece of N type material referred to as the channel, has two smaller pieces of P type 
material attached to its sites, farming PN –Junctions. The channel’s ends are designated the drain and the 
source. And the two pieces of P type material are connected together and their terminal is called the gate. 
With the gate terminal not connected and the potential applied positive at the drain negative at the source a 
drain current Id flows. When the gate is biased negative with respective to the source the PN junctions are 
reverse biased and depletion regions are formed. The channel is more lightly doped than the P type gate 
blocks, so the depletion regions penetrate deeply into the channel. Since depletion region is a region depleted 
of charge carriers it behaves as an Insulator. The result is that the channel is narrowed. Its resistance is 
increased and Id is reduced. When the negative gate bias voltage is further increased, the depletion regions 
meet at the center and Id is cut off completely. 
There are two ways to control the channel width 
? By varying the value of Vgs  
? And by Varying the value of Vds  holding Vgs constant 
 
 
 
 
1 By varying the value of Vgs :-   
    We can vary the width of the channel and in turn vary the amount of drain current. 
This can be done by varying the value of Vgs. This point is illustrated in the fig  below. Here we are 
dealing with N channel FET. So channel is of N type and gate is of P type that constitutes a PN junction. 
This PN junction is always reverse biased in JFET operation .The reverse bias is applied by a battery 
voltage Vgs connected between the gate and the source terminal i.e positive terminal of the battery is 
connected to the source and negative terminal to gate. 
 
 
 
1) When a PN junction is reverse biased the electrons and holes diffuse across junction by leaving 
immobile ions on the N and P sides , the region containing these immobile ions  is known as 
depletion regions. 
2) If both P and N regions are heavily doped then the depletion region extends symmetrically on both 
sides.  
3) But in N channel FET P region is heavily doped than N type thus depletion region extends more in N 
region than P region. 
4) So when no Vds is applied the depletion region is symmetrical and the conductivity becomes Zero. 
Since there are no mobile carriers in the junction. 
5) As the reverse bias voltage is increases the thickness of the depletion region also increases.  i.e. the 
effective channel width decreases . 
6) By varying the value of Vgs we can vary the width of the channel. 
 
2 Varying the value of Vds  holding Vgs constant :- 
? When no voltage is applied to the gate i.e. Vgs=0 , Vds is applied between source and drain the 
electrons will flow from source to drain through the channel constituting drain current Id . 
? With Vgs= 0 for Id= 0 the channel between the gate junctions is entirely open .In response to a small 
applied voltage Vds , the entire bar acts as a simple semi conductor resistor and the current Id 
increases linearly with Vds . 
?       The channel resistances are represented as rd and rs as shown in the fig. 
 
  
 
 
 
 
? This increasing drain current Id produces a voltage drop across rd which reverse biases the gate to 
source junction,(rd> rs) .Thus the depletion region is formed which is not symmetrical . 
? The depletion region i.e. developed penetrates deeper in to the channel near drain and less towards 
source because Vrd >> Vrs. So reverse bias is higher near drain than at source. 
? As a result growing depletion region reduces the effective width of the channel. Eventually a voltage 
Vds is reached at which the channel is pinched off. This is the voltage where the current Id begins to 
level off and approach a constant value. 
?  So, by varying the value of Vds we can vary the width of the channel holding Vgs constant. 
  
When both Vgs and Vds is applied:- 
 
 
          It is of course in principle not possible for the channel to close Completely and there by reduce the 
current Id to Zero for,  if such indeed, could be the case the gate voltage Vgs is applied in the direction to 
provide additional reverse bias  
? When voltage is applied between the drain and source with a battery Vdd, the electrons flow from 
source to drain through the narrow channel existing between the depletion regions. This constitutes 
the drain current Id, its conventional direction is from drain to source. 
? The value of drain current is maximum  when no external voltage is applied between gate and 
source and is designated by Idss. 
 
 
? When Vgs is increased beyond Zero the depletion regions are widened. This reduces the effective 
width of the channel and therefore controls the flow of drain current through the channel. 
? When Vgs is further increased a stage is reached at which to depletion regions touch each other that 
means the entire channel is closed with depletion region. This reduces the drain current to Zero.  
 
6.4 CHARACTERISTICS OF N-CHANNEL JFET :- 
 The family of curves that shows the relation between current and voltage are known as characteristic 
curves. 
 There are two important characteristics of a JFET. 
1) Drain or VI Characteristics 
2) Transfer characteristics 
 
 
? Drain Characteristics:-  
    Drain characteristics shows the relation between the drain to source voltage Vds and 
drain current Id. In order to explain typical drain characteristics let us consider the curve with Vgs= 
0.V. 
1. When Vds is applied and it is increasing the drain current ID also increases linearly up to knee 
point. 
2. This shows that FET behaves like an ordinary resistor. This region is called as ohmic region. 
3. ID increases with increase in drain to source voltage. Here the drain current is increased slowly as 
compared to ohmic region. 
 
 
  
 
 
 
 
 
 
 
 
 
 
 
4) It is because of the fact that there is an increase in VDS .This in turn increases the reverse bias 
voltage across the gate source junction .As a result of this depletion region grows in size thereby 
reducing the effective width of the channel. 
5) All the drain to source voltage corresponding to point the channel width is reduced to a minimum 
value and is known as pinch off. 
6) The drain to source voltage at which channel pinch off occurs is called pinch off voltage(Vp). 
 
PINCH OFF Region:- 
1. This is the region shown by the curve as saturation region. 
2. It is also called as saturation region or constant current region. Because of the channel is occupied 
with depletion region , the depletion region is more towards the drain and less towards the source, 
so the channel is limited, with this only limited number of carriers are only allowed to cross this 
channel from source drain causing a current that is constant in this region. To use FET as an 
amplifier it is operated in this saturation region. 
3. In this drain current remains constant at its maximum value IDSS. 
4. The drain current in the pinch off region depends upon the gate to source voltage and is given by 
the relation 
                                  
                               I d =I dss [1-V gs/Vp]
2 
 
  This is known as shokley’s relation. 
BREAKDOWN REGION:- 
? The region is shown by the curve .In this region, the drain current increases rapidly as the drain to 
source voltage is increased. 
? It is because of the gate to source junction due to avalanche effect. 
? The avalanche break down occurs at progressively lower value of VDS because the reverse bias 
gate voltage adds to the drain voltage thereby increasing effective voltage across the gate junction 
 
 
 
 
 This causes  
o The maximum saturation drain current is smaller 
o The ohmic region portion decreased.