Hardware Semi Logical View Notes | EduRev

Created by: Rohnit Roy

: Hardware Semi Logical View Notes | EduRev

 Page 1


University of Washington 
CSE351  
!? Announcements: 
!? HW0, having fun? 
!? Use discussion boards! 
!? Check if office hours work for you, let us know if they don’t. 
!? Make sure you are subscribed to the mailing lists. 
!? If you enrolled recently, you might not be on it 
1 
University of Washington 
Today’s topics 
!? Memory and its bits, bytes, and integers 
!? Representing information as bits 
!? Bit-level manipulations 
!? Boolean algebra 
!? Boolean algebra in C 
2 
Page 2


University of Washington 
CSE351  
!? Announcements: 
!? HW0, having fun? 
!? Use discussion boards! 
!? Check if office hours work for you, let us know if they don’t. 
!? Make sure you are subscribed to the mailing lists. 
!? If you enrolled recently, you might not be on it 
1 
University of Washington 
Today’s topics 
!? Memory and its bits, bytes, and integers 
!? Representing information as bits 
!? Bit-level manipulations 
!? Boolean algebra 
!? Boolean algebra in C 
2 
University of Washington 
Hardware: Logical View 
CPU Memory 
Bus 
Disks 
Net 
USB Etc. 
University of Washington 
Hardware: Semi-Logical View 
Page 3


University of Washington 
CSE351  
!? Announcements: 
!? HW0, having fun? 
!? Use discussion boards! 
!? Check if office hours work for you, let us know if they don’t. 
!? Make sure you are subscribed to the mailing lists. 
!? If you enrolled recently, you might not be on it 
1 
University of Washington 
Today’s topics 
!? Memory and its bits, bytes, and integers 
!? Representing information as bits 
!? Bit-level manipulations 
!? Boolean algebra 
!? Boolean algebra in C 
2 
University of Washington 
Hardware: Logical View 
CPU Memory 
Bus 
Disks 
Net 
USB Etc. 
University of Washington 
Hardware: Semi-Logical View 
University of Washington 
Hardware: Physical View 
University of Washington 
CPU “Memory”: Registers and 
Instruction Cache 
"? There are a fixed number of registers on the CPU 
"? Registers hold data 
"? There is an I-cache  on the CPU holding recently fetched instructions 
"? If you execute a loop that fits in the cache, the CPU goes to memory for 
those instructions only once, then executes out of its cache 
"? This slide is just an introduction.  We'll see a more full explanation later 
in the course. 
Instruction 
Cache 
Registers 
Memory 
Program 
controlled 
data 
movement 
Transparent 
(hw controlled) 
instruction 
caching 
CPU 
Page 4


University of Washington 
CSE351  
!? Announcements: 
!? HW0, having fun? 
!? Use discussion boards! 
!? Check if office hours work for you, let us know if they don’t. 
!? Make sure you are subscribed to the mailing lists. 
!? If you enrolled recently, you might not be on it 
1 
University of Washington 
Today’s topics 
!? Memory and its bits, bytes, and integers 
!? Representing information as bits 
!? Bit-level manipulations 
!? Boolean algebra 
!? Boolean algebra in C 
2 
University of Washington 
Hardware: Logical View 
CPU Memory 
Bus 
Disks 
Net 
USB Etc. 
University of Washington 
Hardware: Semi-Logical View 
University of Washington 
Hardware: Physical View 
University of Washington 
CPU “Memory”: Registers and 
Instruction Cache 
"? There are a fixed number of registers on the CPU 
"? Registers hold data 
"? There is an I-cache  on the CPU holding recently fetched instructions 
"? If you execute a loop that fits in the cache, the CPU goes to memory for 
those instructions only once, then executes out of its cache 
"? This slide is just an introduction.  We'll see a more full explanation later 
in the course. 
Instruction 
Cache 
Registers 
Memory 
Program 
controlled 
data 
movement 
Transparent 
(hw controlled) 
instruction 
caching 
CPU 
University of Washington 
Performance: It's Not Just CPU Speed 
"? Data and instructions reside in memory 
"? To execute an instruction, it must be fetched onto the CPU 
"? Then, the data the instruction operates on must be fetched 
onto the CPU 
"? CPU ! Memory bandwidth can limit performance 
"? Improving performance 1: hardware improvements to 
increase memory bandwidth (e.g., DDR ! DDR2 ! 
DDR3) 
"? Improving performance 2: move less data into/out of 
the CPU 
-? Put some “memory” on the CPU chip 
University of Washington 
!?Introduction to Memory 
Page 5


University of Washington 
CSE351  
!? Announcements: 
!? HW0, having fun? 
!? Use discussion boards! 
!? Check if office hours work for you, let us know if they don’t. 
!? Make sure you are subscribed to the mailing lists. 
!? If you enrolled recently, you might not be on it 
1 
University of Washington 
Today’s topics 
!? Memory and its bits, bytes, and integers 
!? Representing information as bits 
!? Bit-level manipulations 
!? Boolean algebra 
!? Boolean algebra in C 
2 
University of Washington 
Hardware: Logical View 
CPU Memory 
Bus 
Disks 
Net 
USB Etc. 
University of Washington 
Hardware: Semi-Logical View 
University of Washington 
Hardware: Physical View 
University of Washington 
CPU “Memory”: Registers and 
Instruction Cache 
"? There are a fixed number of registers on the CPU 
"? Registers hold data 
"? There is an I-cache  on the CPU holding recently fetched instructions 
"? If you execute a loop that fits in the cache, the CPU goes to memory for 
those instructions only once, then executes out of its cache 
"? This slide is just an introduction.  We'll see a more full explanation later 
in the course. 
Instruction 
Cache 
Registers 
Memory 
Program 
controlled 
data 
movement 
Transparent 
(hw controlled) 
instruction 
caching 
CPU 
University of Washington 
Performance: It's Not Just CPU Speed 
"? Data and instructions reside in memory 
"? To execute an instruction, it must be fetched onto the CPU 
"? Then, the data the instruction operates on must be fetched 
onto the CPU 
"? CPU ! Memory bandwidth can limit performance 
"? Improving performance 1: hardware improvements to 
increase memory bandwidth (e.g., DDR ! DDR2 ! 
DDR3) 
"? Improving performance 2: move less data into/out of 
the CPU 
-? Put some “memory” on the CPU chip 
University of Washington 
!?Introduction to Memory 
University of Washington 
Binary Representations 
!? Base 2 number representation 
!? Represent 351
10
 as 0000000101011111
2 
 or  101011111
2 
!? Electronic implementation 
!? Easy to store with bi-stable elements 
!? Reliably transmitted on noisy and inaccurate wires  
0.0V 
0.5V 
2.8V 
3.3V 
0 1 0
9 
University of Washington 
Encoding Byte Values 
!? Binary  00000000
2
 --  11111111
2 
!? Byte = 8 bits (binary digits) 
!? Decimal               0
10
 --  255
10 
!? Hexadecimal                00
16
 --  FF
16 
!? Byte = 2 hexadecimal (hex) or base 16 digits 
!? Base-16 number representation 
!? Use characters ‘0’ to ‘9’ and ‘A’ to ‘F’ 
!? Write FA1D37B
16
 in C  
!? as   0xFA1D37B  or   0xfa1d37b 
0 0 0000 
1 1 0001 
2 2 0010 
3 3 0011 
4 4 0100 
5 5 0101 
6 6 0110 
7 7 0111 
8 8 1000 
9 9 1001 
A 10 1010 
B 11 1011 
C 12 1100 
D 13 1101 
E 14 1110 
F 15 1111 
10 
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