Introduction to 8085 Microprocessor Computer Science Engineering (CSE) Notes | EduRev

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Computer Science Engineering (CSE) : Introduction to 8085 Microprocessor Computer Science Engineering (CSE) Notes | EduRev

The document Introduction to 8085 Microprocessor Computer Science Engineering (CSE) Notes | EduRev is a part of the Computer Science Engineering (CSE) Course Microprocessors and Microcontrollers - Notes, Videos, MCQs.
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Introduction to 8085 Microprocessor:

The Salient Features of 8085 Microprocessor: 

  • 8085 is an 8 bit microprocessor, manufactured with N-MOS technology.
  • It has 16-bit address bus and hence can address up to 216 = 65536 bytes (64KB) memory locations through A0-A15.
  • The first 8 lines of address bus and 8 lines of data bus are multiplexed AD0 - AD7.

Data bus is a group of 8 lines D0 - D7. 

  • It supports external interrupt request.8085 consists of 16 bit program counter (PC) and stack pointer (SP).
  • Six 8-bit general purpose register arranged in pairs: BC, DE, HL.
  • It requires a signal +5V power supply and can operate at 3 MHz, 5 MHz and 6 MHz Serial in/Serial out Port.
  • It is enclosed with 40 pins DIP (Dual in line package).

Internal Architecture of 8085:

Introduction to 8085 Microprocessor Computer Science Engineering (CSE) Notes | EduRev

8085 Bus Structure: Address Bus:

  • The address bus is a group of 16 lines generally identified as A0 to A15.
  • The address bus is unidirectional: bits flow in one direction-from the MPU to peripheral devices.
  • The MPU uses the address bus to perform the first function: identifying a peripheral or a memory location.

Introduction to 8085 Microprocessor Computer Science Engineering (CSE) Notes | EduRev

Data Bus:

  • The data bus is a group of eight lines used for data flow.
  • These lines are bi-directional - data flow in both directions between the MPU and memory and peripheral devices.
  • The MPU uses the data bus to perform the second function: transferring binary information.
  • The eight data lines enable the MPU to manipulate 8-bit data ranging from 00 to FF (28 = 256 numbers).
  • The largest number that can appear on the data bus is 11111111.

Control Bus:

  • The control bus carries synchronization signals and providing timing signals.
  • The MPU generates specific control signals for every operation it performs. These signals are used to identify a device type with which the MPU wants to communicate.

Registers of 8085: 

  • The 8085 have six general-purpose registers to store 8-bit data during program execution.
  • These registers are identified as B, C, D, E, H, and L.
  • They can be combined as register pairs-BC, DE, and HL-to perform some 16-bit operations.

Introduction to 8085 Microprocessor Computer Science Engineering (CSE) Notes | EduRev  

Accumulator (A):

  • The accumulator is an 8-bit register that is part of the arithmetic/logic unit (ALU).
  • This register is used to store 8-bit data and to perform arithmetic and logical operations.
  •  The result of an operation is stored in the accumulator.

Flags:

  • The ALU includes five flip-flops that are set or reset according to the result of an operation.
  • The microprocessor uses the flags for testing the data conditions.
  •  They are Zero (Z), Carry (CY), Sign (S), Parity (P), and Auxiliary Carry (AC) flags. The most commonly used flags are Sign, Zero, and Carry.

The bit position for the flags in flag register is,

Introduction to 8085 Microprocessor Computer Science Engineering (CSE) Notes | EduRev

1. Sign Flag (S):

After execution of any arithmetic and logical operation, if D7 of the result is 1, the sign flag is set. Otherwise it is reset.
D7 is reserved for indicating the sign; the remaining is the magnitude of number.
If D7 is 1, the number will be viewed as negative number. If D7 is 0, the number will be viewed as positive number.

2. Zero Flag (z):

If the result of arithmetic and logical operation is zero, then zero flag is set otherwise it is reset.

3. Auxiliary Carry Flag (AC):

If D3 generates any carry when doing any  arithmetic and logical operation, this flag is set.
Otherwise it is reset

4. Parity Flag (P):

If the result of arithmetic and logical operation contains even number of 1's then this flag will be set and if it is odd number of 1's it will be reset.

5. Carry Flag (CY):

If any arithmetic and logical operation result any carry then carry flag is set otherwise it is reset.

Arithmetic and Logic Unit (ALU):

  • It is used to perform the arithmetic operations like addition, subtraction, multiplication, division, increment and decrement and logical operations like AND, OR and EX-OR.
  • It receives the data from accumulator and registers.
  • According to the result it set or reset the flags.

Program Counter (PC): 

  • This 16-bit register sequencing the execution of instructions.
  • It is a memory pointer. Memory locations have 16-bit addresses, and that is why this is a 16-bit register.
  • The function of the program counter is to point to the memory address of the next instruction to be executed.
  • When an opcode is being fetched, the program counter is incremented by one to point to the next memory location.

Stack Pointer (SP): 

  • The stack pointer is also a 16-bit register used as a memory pointer.
  •  It points to a memory location in R/W memory, called the stack.
  • The beginning of the stack is defined by loading a 16-bit address in the stack pointer (register).

Temporary Register: It is used to hold the data during the arithmetic and logical operations.

Instruction Register: When an instruction is fetched from the memory, it is loaded in the instruction register.

Instruction Decoder: It gets the instruction from the instruction register and decodes the instruction. It identifies the instruction to be performed.

Serial I/O Control: It has two control signals named SID and SOD for serial data transmission.

Timing and Control unit:

  • It has three control signals ALE, RD (Active low) and WR (Active low) and three status signals IO/M(Active low), S0 and S1.
  • ALE is used for provide control signal to synchronize the components of microprocessor and timing for instruction to perform the operation.
  • RD (Active low) and WR (Active low) are used to indicate whether the operation is reading the data from memory or writing the data into memory respectively.
  • IO/M(Active low) is used to indicate whether the operation is belongs to the memory or peripherals. · If,

Introduction to 8085 Microprocessor Computer Science Engineering (CSE) Notes | EduRev

Interrupt Control Unit:

  • It receives hardware interrupt signals and sends an acknowledgement for receiving the interrupt signal.

Pin Diagram and Pin Description Of 8085

8085 is a 40 pin IC, DIP package. The signals from the pins can be grouped as follows

1. Power supply and clock signals

2. Address bus

3. Data bus

4. Control and status signals

5. Interrupts and externally initiated signals

6. Serial I/O ports

Introduction to 8085 Microprocessor Computer Science Engineering (CSE) Notes | EduRev

Introduction to 8085 Microprocessor Computer Science Engineering (CSE) Notes | EduRev

1. Power supply and clock frequency signals

  • Vcc + 5 volt power supply 
  • Vss Ground
  • X1, X2: Crystal or R/C network or LC network connections to set the frequency of internal clock generator. 
  • The frequency is internally divided by two. Since the basic operating timing frequency is 3 MHz, a 6 MHz crystal is connected externally.
  • CLK (output)-Clock Output is used as the system clock  for  peripheral and devices interfaced with the microprocessor.

2. Address Bus: 

  • A8 - A15 (output; 3-state)
  • It carries the most significant 8 bits of the memory address or the 8 bits of the I/O address;

3. Multiplexed Address / Data Bus:

  • AD0 - AD7 (input/output; 3-state)
  • These multiplexed set of lines used to carry the lower order 8 bit address as well as data bus.
  • During the opcode fetch operation, in the first clock cycle, the lines deliver the lower order address A0 - A7.
  • In the subsequent IO / memory, read / write clock cycle the lines are used as data bus.
  • The CPU may read or write out data through these lines.

4. Control and Status signals: 

  • ALE (output) - Address Latch Enable.
  • This signal helps to capture the lower order address presented on the multiplexed address

/ data bus.

  • RD (output 3-state, active low) - Read memory or IO device.
  • This indicates that the selected memory location or I/O device is to be read and that the data bus is ready for accepting data from the memory or I/O device.
  • WR (output 3-state, active low) - Write memory or IO device.
  • This indicates that the data on the data bus is to be written into the selected memory location or I/O device.
  • IO/M (output) - Select memory or an IO device.
  • This status signal indicates that the read / write operation relates to whether the memory or I/O device.
  • It goes high to indicate an I/O operation.
  • It goes low for memory operations.

5. Status Signals:

  • It is used to know the type of current operation of the microprocessor.

Introduction to 8085 Microprocessor Computer Science Engineering (CSE) Notes | EduRev

6. Interrupts and externally initiated operations:

  • They are the signals initiated by an external device to request the microprocessor to do a particular task or work.
  • There are five hardware interrupts called,

Introduction to 8085 Microprocessor Computer Science Engineering (CSE) Notes | EduRev  

  • On receipt of an interrupt, the microprocessor acknowledges the interrupt by the active low INTA (Interrupt Acknowledge) signal.

Reset In (input, active low) 

  • This signal is used to reset the microprocessor.
  • The program counter inside the microprocessor is set to zero.
  • The buses are tri-stated.

Reset Out (Output)

  • It indicates CPU is being reset.
  • Used to reset all the connected devices when the microprocessor is reset

7. Direct Memory Access (DMA):

Tri state devices:

Introduction to 8085 Microprocessor Computer Science Engineering (CSE) Notes | EduRev

  • 3 output states are high & low states and additionally a high impedance state.
  • When enable E is high the gate is enabled and the output Q can be 1 or 0 (if A is 0, Q is 1, otherwise Q is 0). However, when E is low the gate is disabled and the output Q enters into a high impedance state. 

Introduction to 8085 Microprocessor Computer Science Engineering (CSE) Notes | EduRev

Introduction to 8085 Microprocessor Computer Science Engineering (CSE) Notes | EduRev

  •  For both high and low states, the output Q draws a current from the input of the OR gate.
  • When E is low, Q enters a high impedance state; high impedance means it is electrically isolated from the OR gate's input, though it is physically connected. Therefore, it does not draw any current from the OR gate's input.
  • When 2 or more devices are connected to a common bus, to prevent the devices from interfering with each other, the tristate gates are used to disconnect all devices except the one that is communicating at a given instant.
  • The CPU controls the data transfer operation between memory and I/O device. Direct Memory Access operation is used for large volume data transfer between memory and an I/O device directly.
  • The CPU is disabled by tri-stating its buses and the transfer is effected directly by external control circuits.
  • HOLD signal is generated by the DMA controller circuit. On receipt of this signal, the microprocessor acknowledges the request by sending out HLDA signal and leaves out the control of the buses. After the HLDA signal the DMA controller starts the direct transfer of data. 

READY (input) 

  •  Memory and I/O devices will have slower response compared to microprocessors.
  • Before completing the present job such a slow peripheral may not be able to handle further data or control signal from CPU.
  • The processor sets the READY signal after completing the present job to access the data.
  • The microprocessor enters into WAIT state while the READY pin is disabled.

8. Single Bit Serial I/O ports: 

  • SID (input) - Serial input data line
  • SOD (output) - Serial output data line
  • These signals are used for serial communication.
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