PPT: Digital Logic Families Notes | EduRev

Digital Electronics

Electrical Engineering (EE) : PPT: Digital Logic Families Notes | EduRev

 Page 1


Digital Logic Families
1
Page 2


Digital Logic Families
1
Overview
 Integration, Moore’s law
 Early families (DL, RTL)
 TTL
 Evolution of TTL family
 ECL
 CMOS family and its evolution
 Overview
2
Page 3


Digital Logic Families
1
Overview
 Integration, Moore’s law
 Early families (DL, RTL)
 TTL
 Evolution of TTL family
 ECL
 CMOS family and its evolution
 Overview
2
Integration Levels
 Gate/transistor ratio is roughly 1/10
– SSI < 12 gates/chip
– MSI < 100 gates/chip
– LSI …1K gates/chip
– VLSI …10K gates/chip
– ULSI …100K gates/chip
– GSI …1Meg gates/chip
3
Page 4


Digital Logic Families
1
Overview
 Integration, Moore’s law
 Early families (DL, RTL)
 TTL
 Evolution of TTL family
 ECL
 CMOS family and its evolution
 Overview
2
Integration Levels
 Gate/transistor ratio is roughly 1/10
– SSI < 12 gates/chip
– MSI < 100 gates/chip
– LSI …1K gates/chip
– VLSI …10K gates/chip
– ULSI …100K gates/chip
– GSI …1Meg gates/chip
3
Moore’s law
 A prediction made by Moore (a co-founder of Intel) in
1965: “… a number of transistors to double every 2
years.”
4
Page 5


Digital Logic Families
1
Overview
 Integration, Moore’s law
 Early families (DL, RTL)
 TTL
 Evolution of TTL family
 ECL
 CMOS family and its evolution
 Overview
2
Integration Levels
 Gate/transistor ratio is roughly 1/10
– SSI < 12 gates/chip
– MSI < 100 gates/chip
– LSI …1K gates/chip
– VLSI …10K gates/chip
– ULSI …100K gates/chip
– GSI …1Meg gates/chip
3
Moore’s law
 A prediction made by Moore (a co-founder of Intel) in
1965: “… a number of transistors to double every 2
years.”
4
In the beginning…
Diode Logic (DL)
 simplest; does not scale
 NOT not possible (need
an active element)
=
=
Resistor-Transistor
Logic (RTL)
 replace diode switch
with a transistor switch
 can be cascaded
 large power draw
5
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