Page 1
Memories
A memory is neither a sequential circuit (since we require sequential circuits to be clocked, and memories are not
clocked), nor a combinatorial circuit, since its output values depend on past values.
In general, a memory has m inputs that are called the address inputs that are used to select exactly one out of 2
m
words,
each one consisting of n bits.
Furthermore, it has n connectors that are bidirectional that are called the data lines. These data lines are used both as
inputs in order to store information in a word selected by the address inputs, and as outputs in order to recall a
previously stored value. Such a solution reduces the number of required connectors by a factor two.
Finally, it has an input called enable (see the section on tri-state logic for an explanation) that controls whether the data
lines have defined states or not, and an input called r/w that determines the direction of the data lines.
A memory with an arbitrary value of m and an arbitrary value of n can be built from memories with smaller values of
these parameters. To show how this can be done, we first show how a one-bit memory (one with m = 0 and n = 1) can
be built. Here is the circuit:
The central part of the circuit is an SR-latch that holds one bit of information. When enable is 0, the output d
0
is isolated
both from the inputs to and the output from the SR-latch. Information is passed from d
0
to the inputs of the latch when
enable is 1 and r/w is 1 (indicating write). Information is passed from the output x to d
0
when enable is 1 and r/w is 0
(indicating read).
Now that we know how to make a one-bit memory, we must figure out how to make larger memories. First, suppose we
have n memories of 2
m
words, each one consisting of a single bit. We can easily convert these to a single memory with
2
m
words, each one consisting of a n bits. Here is how we do it:
Page 2
Memories
A memory is neither a sequential circuit (since we require sequential circuits to be clocked, and memories are not
clocked), nor a combinatorial circuit, since its output values depend on past values.
In general, a memory has m inputs that are called the address inputs that are used to select exactly one out of 2
m
words,
each one consisting of n bits.
Furthermore, it has n connectors that are bidirectional that are called the data lines. These data lines are used both as
inputs in order to store information in a word selected by the address inputs, and as outputs in order to recall a
previously stored value. Such a solution reduces the number of required connectors by a factor two.
Finally, it has an input called enable (see the section on tri-state logic for an explanation) that controls whether the data
lines have defined states or not, and an input called r/w that determines the direction of the data lines.
A memory with an arbitrary value of m and an arbitrary value of n can be built from memories with smaller values of
these parameters. To show how this can be done, we first show how a one-bit memory (one with m = 0 and n = 1) can
be built. Here is the circuit:
The central part of the circuit is an SR-latch that holds one bit of information. When enable is 0, the output d
0
is isolated
both from the inputs to and the output from the SR-latch. Information is passed from d
0
to the inputs of the latch when
enable is 1 and r/w is 1 (indicating write). Information is passed from the output x to d
0
when enable is 1 and r/w is 0
(indicating read).
Now that we know how to make a one-bit memory, we must figure out how to make larger memories. First, suppose we
have n memories of 2
m
words, each one consisting of a single bit. We can easily convert these to a single memory with
2
m
words, each one consisting of a n bits. Here is how we do it:
We have simply connected all the address inputs together, all the enables together, and all the read/writes together. Each
one-but memory supplies one of the bits of the n-bit word in the final circuit.
Next, we have to figure out how to make a memory with more words. To show that, we assume that we have two
memories each with m address inputs and n data lines. We show how we can connect them so as to obtain a single
memory with m + 1 address inputs and n data lines. Here is the circuit:
As you can see, the additional address line is combined with the enable input to select one of the two smaller memories.
Only one of them will be connected to the data lines at a time (because of the way tri-state logic works).
Page 3
Memories
A memory is neither a sequential circuit (since we require sequential circuits to be clocked, and memories are not
clocked), nor a combinatorial circuit, since its output values depend on past values.
In general, a memory has m inputs that are called the address inputs that are used to select exactly one out of 2
m
words,
each one consisting of n bits.
Furthermore, it has n connectors that are bidirectional that are called the data lines. These data lines are used both as
inputs in order to store information in a word selected by the address inputs, and as outputs in order to recall a
previously stored value. Such a solution reduces the number of required connectors by a factor two.
Finally, it has an input called enable (see the section on tri-state logic for an explanation) that controls whether the data
lines have defined states or not, and an input called r/w that determines the direction of the data lines.
A memory with an arbitrary value of m and an arbitrary value of n can be built from memories with smaller values of
these parameters. To show how this can be done, we first show how a one-bit memory (one with m = 0 and n = 1) can
be built. Here is the circuit:
The central part of the circuit is an SR-latch that holds one bit of information. When enable is 0, the output d
0
is isolated
both from the inputs to and the output from the SR-latch. Information is passed from d
0
to the inputs of the latch when
enable is 1 and r/w is 1 (indicating write). Information is passed from the output x to d
0
when enable is 1 and r/w is 0
(indicating read).
Now that we know how to make a one-bit memory, we must figure out how to make larger memories. First, suppose we
have n memories of 2
m
words, each one consisting of a single bit. We can easily convert these to a single memory with
2
m
words, each one consisting of a n bits. Here is how we do it:
We have simply connected all the address inputs together, all the enables together, and all the read/writes together. Each
one-but memory supplies one of the bits of the n-bit word in the final circuit.
Next, we have to figure out how to make a memory with more words. To show that, we assume that we have two
memories each with m address inputs and n data lines. We show how we can connect them so as to obtain a single
memory with m + 1 address inputs and n data lines. Here is the circuit:
As you can see, the additional address line is combined with the enable input to select one of the two smaller memories.
Only one of them will be connected to the data lines at a time (because of the way tri-state logic works).
Read-only memories
A read-only memory (or ROM for short), is like an ordinary memory, except that it does not have the capability of
writing. Its contents is fixed at the factory.
Since the contents cannot be altered, we don't have a r/w signal. Except for the enable signal, a ROM is thus like an
ordinary combinatorial circuit with m inputs and n outputs.
ROMs are usually programmable. They are often sold with a contents of all 0s or all 1s. The user can then stick it in a
special machine and fill it with the desired contents, i.e. the ROM can be programmed. In that case, we sometimes call it
a PROM (programmable ROM).
Some varieties of PROMS can be erased and re-programmed. The way they are erased is typically with ultra-violet
light. When the PROM can be erased, we sometimes call it EPROM (erasable PROM).
A programmable logic device (PLD)
A programmable logic device or PLD is an electronic component used to build reconfigurable digital circuits. Unlike a
logic gate, which has a fixed function, a PLD has an undefined function at the time of manufacture. Before the PLD can
be used in a circuit it must be programmed
Using a ROM as a PLD
Before PLDs were invented, read-only memory (ROM) chips were used to create arbitrary combinational logic
functions of a number of inputs. Consider a ROM with m inputs (the address lines) and n outputs (the data lines). When
used as a memory, the ROM contains 2m words of n bits each. Now imagine that the inputs are driven not by an m-bit
address, but by m independent logic signals. Theoretically, there are 2m possible Boolean functions of these m signals,
but the structure of the ROM allows just 2n of these functions to be produced at the output pins. The ROM therefore
becomes equivalent to n separate logic circuits, each of which generates a chosen function of the m inputs.
The advantage of using a ROM in this way is that any conceivable function of the m inputs can be made to appear at any
of the n outputs, making this the most general-purpose combinatorial logic device available. Also, PROMs
(programmable ROMs), EPROMs (ultraviolet-erasable PROMs) and EEPROMs (electrically erasable PROMs) are
available that can be programmed using a standard PROM programmer without requiring specialised hardware or
software. However, there are several disadvantages:
• They are usually much slower than dedicated logic circuits,
• they cannot necessarily provide safe "covers" for asynchronous logic transitions so the PROM's outputs may
glitch as the inputs switch,
• They consume more power, and
• Because only a small fraction of their capacity is used in any one application, they often make an inefficient use
of space.
Since most ROMs do not have input or output registers, they cannot be used stand-alone for sequential logic. An
external TTL register was often used for sequential designs such as state machines.
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