The Peripherals of an embedded processor can either be on the same chip as the processor or can be connected externally.
Fig. 14.1 Block Diagram of the basic 8051 Architecture
For example in a typical embedded processor as shown in Fig.14.1 timer, interrupt. Serial port and parallel ports reside on the single chip. These dedicated units are otherwise termed as single-purpose processor. These units are designed to achieve the following objectives. They can be a part of the microcontroller or can reside outside the chip and therefore should be properly interfaced with the processor.
The tasks generally carried out by such units are
Timer is a very common and useful peripheral. It is used to generate events at specific times or measures the duration of specific events which are external to the processor. It is a programmable device, i.e. the time period can be adjusted by writing specific bit patterns to some of the registers called timer-control registers.
A counter is a more general version of the timer. It is used to count events in the form of pulses which is fed to it.
Fig.14.2(b) provides the structure of another timer where a multiplexer is used to choose between an internal clock or external clock. The mode bit when set or reset decided the selection. For internal clock(Clk) it behaves like the timer in Fig.14.2(a). For the external count in (cnt_in) it just counts the number of occurrences.
Fig.14.2(c) shows a timer with the terminal count. This can generate an event if a particular interval of time has been elapsed. The counter restarts after every terminal count.
Fig. 14.3 The Timer Count and Output. The timer is in count-down mode. In every clock pulse the count is decremented by 1. When the count value reaches zero the output of the counter i.e. TOP goes high for a predetermined time. The counter has to be loaded with a new or previous value of the count by external program or it can be loaded automatically every time the count reaches zero.
Timer in 8051 Microcontroller
Fig.14.1 shows the architecture of 8051 which has got two timer units.
The 8051 comes equipped with two timers, both of which may be controlled, set, read, and configured individually. The 8051 timers have three general functions: 1) Keeping time and/or calculating the amount of time between events, 2) Counting the events themselves, or 3) Generating baud rates for the serial port.
As mentioned before, the 8051 has two timers which each function essentially the same way. One timer is TIMER0 and the other is TIMER1. The two timers share two Special Function Registers(SFR) (TMOD and TCON) which control the timers, and each timer also has two SFRs dedicated solely to itself (TH0/TL0 and TH1/TL1).
Timer0 and Timer1
The Timer and Counter functions are selected in the Special Function Register TMOD. These two Timer/Counter have four operating modes which are selected by bit-pairs (M1. M0) in TMOD. Modes 0, 1, and 2 are the same for both Timer/Counters.Mode3 is different.
Either Timer in Mode0 is an 8-bit Counter with a divide-by-32 pre-scaler. In this mode, the Timer register is configured as a 13-Bit register. As the count rolls over from all 1s to all 0s, it sets the Timer interrupt flag TF1. The counted input is enabled to the Timer whenTR1 = 1and either GATE = 0 or . (Setting GATE = 1 allows the Timer to be controlled by external input INT1, to facilitate pulse width measurements.)
|Symbol||Position||Name and Significance||Symbol||Position||Name and Significance|
|TF1||TCON.7||Timer 1 overflow Flag. Set by hardware on Timer/Counter overflow. Cleared by hardware when processor vectors to interrupt routine.||IE1||TCON.3||Interrupt 1 Edge flag. Set by hardware when external interrupt edge detected. Cleared when interrupt processed.|
|TR1||TCON.6||Timer 1 Run control bit. Set/cleared by software to turn Timer/Counter on/off.||IT1||TCON.2||Interrupt 1 Type control bit. Set/cleared by software to specify falling edge/low level triggered external interrupts.|
|TF0||TCON.5||Timer 0 overflow Flag. Set by hardware on Timer/Counter overflow. Cleared by hardware when processor vectors to interrupt routine.||IE0||TCON.1||Interrupt 0 Edge flag. Set by hardware when external interrupt edge detected. Cleared when interrupt processed.|
|TR0||TCON.4||Timer 1 Run control bit. Set/cleared by software to turn Timer/Counter on/off.||IT0||TCON.0||Interrupt 0 Type control bit. Set/cleared by software to specify falling edge/low level triggered external interrupts.|
Timer/Counter Control Register (TCON)
MODE 1: Mode 1 is the same as Mode 0, except that the Timer register is being run with all 16bits.
Fig. 14.5 MODE 2 configures the Timer register as an 8-bit counter with automatic reload
Fig. 14.6 MODE 3: Timer simply holds its count. Timer 0 in Mode 3 establishes TL0 and TH0 as two separate counters.
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