Stack & Register Based CPU Organization

Introduction of Stack based CPU Organization

The computers which use Stack-based CPU Organization are based on a data structure called stack. The stack is a list of data words. It uses Last In First Out (LIFO) access method which is the most popular access method in most of the CPU. A register is used to store the address of the topmost element of the stack which is known as Stack pointer (SP). In this organisation, ALU operations are performed on stack data. It means both the operands are always required on the stack. After manipulation, the result is placed in the stack.

The main two operations that are performed on the operators of the stack are Push and Pop. These two operations are performed from one end only.

1. Push: This operation results in inserting one operand at the top of the stack and it decrease the stack pointer register. The format of the PUSH instruction is:
PUSH
It inserts the data word at specified address to the top of the stack. It can be implemented as:
//decrement SP by 1
SP <-- SP - 1 

//store the content of specified memory address
//into SP; i.e, at top of stack
SP <-- (memory address) 

2. Pop: This operation results in deleting one operand from the top of the stack and it increase the stack pointer register. The format of the POP instruction is:
POP
It deletes the data word at the top of the stack to the specified address. It can be implemented as:
//transfer the content of  SP (i.e, at top most data)
//into specified memory location
(memory address) <-- SP

//increment SP by 1

SP <-- SP + 1
Operation type instruction does not need the address field in this CPU organization. This is because the operation is performed on the two operands that are on the top of the stack. For example:
SUB
This instruction contains the opcode only with no address field. It pops the two top data from the stack, subtracting the data, and pushing the result into the stack at the top.
PDP-11, Intel's 8085 and HP 3000 are some of the examples of the stack organized computers.

The advantages of Stack based CPU organization -

• Efficient computation of complex arithmetic expressions.
• Execution of instructions is fast because operand data are stored in consecutive memory locations.
• Length of instruction is short as they do not have address field.

The disadvantages of Stack based CPU organization -

• The size of the program increases.

Note: Stack based CPU organisation uses zero address instruction.

Introduction of General Register based CPU Organization

When we are using multiple general-purpose registers, instead of a single accumulator register, in the CPU Organization then this type of organization is known as General register-based CPU Organization. In this type of organization, the computer uses two or three address fields in their instruction format. Each address field may specify a general register or a memory word. If many CPU registers are available for heavily used variables and intermediate results, we can avoid memory references much of the time, thus vastly increasing program execution speed, and reducing program size.
For example:
MULT R1, R2, R3

This is an instruction of an arithmetic multiplication written in assembly language. It uses
Three address fields R1, R2, and R3. The meaning of this instruction is:
R1 ← R2 * R3

This instruction also can be written using only two address fields as: 
MULT R1, R2 

In this instruction, the destination register is the same as one of the source registers. This means the operation
R1 ← R1 * R2 

The use of large number of registers results in short program with limited instructions.
Some examples of General register based CPU Organization are IBM 360 and PDP- 11. 

The advantages of General register based CPU organization - 

• Efficiency of CPU increases as there are a large number of registers are used in this organization. 
• Less memory space is used to store the program since the instructions are written in compact way. 

 The disadvantages of General register based CPU organization - 

• Care should be taken to avoid unnecessary usage of registers. Thus, compilers need to be more intelligent in this aspect. 
• Since large number of registers are used, thus extra cost is required in this organization. 

General register CPU organisation of two type:

1. Register-memory reference architecture (CPU with less register) - In this organisation Source 1 is always required in register, source 2 can be present either in register or in memory. Here two address instruction formats is the compatible instruction format.
2. Register-register reference architecture (CPU with more register) - In this organisation ALU operations are performed only on a register data. So operands are required in the register. After manipulation result is also placed in register. Here three address instruction formats is the compatible instruction format.