Interrupts | Computer for GCSE/IGCSE - Year 11 PDF Download

Interrupts

• Computers utilize the fetch-decode-execute cycle in the CPU to repeatedly execute instructions. However, during this process, external devices may need to send signals to the CPU to temporarily halt its current operations (interrupt) for specific tasks. For instance, a user might initiate Ctrl+Alt+Delete to launch the task manager or request a document to be printed.
• These interruptions must ensure that the CPU halts its current task to address the incoming request. Interrupts are directed to a designated area known as the interrupt service routine.

Two Types of Interrupt

• Hardware Interrupt:
  • Occurs due to a hardware device failure, like pressing a key on the keyboard or moving the mouse.
• Software Interrupt:
  • This type of interrupt occurs when an application halts or requests services from the operating system. Examples include a program not responding, division by zero, or two processes attempting to access the same memory location.
  • An instance of a program becoming unresponsive.
  • Encountering a division by zero situation.
  • Two processes vying to access identical memory locations.

Registers in the CPU

• Within the CPU, there exist registers that currently hold data being processed. These registers are crucial during ongoing operations.
• Examples of such registers include those responsible for storing temporary variables, memory addresses, or data needed for arithmetic operations.
• Registers like the program counter (PC) keep track of the current position in code execution.
• Data registers hold operands or results of operations.

Computer Registers

• Program Counter: The program counter indicates the memory address of the next instruction to be fetched.
• Current Instruction Register: The current instruction register holds the instruction currently being executed.
• Memory Address Register: The memory address register stores the location in RAM where data is stored or will be sent.
• Memory Data Register: The memory data register stores the actual data from or to be sent to a specific RAM location.

The Interrupt Service Routine

• When an interrupt is triggered, the Interrupt Service Routine (ISR) is a set of instructions that need to be executed to handle the interrupt.
• For instance, if a device sends a signal to the processor, indicating an interrupt, the ISR takes over to process this event.

Register Handling During Interrupt

• Registers, which store temporary data within the processor, must be adjusted to deal with the interrupt.
• When an interrupt occurs, the current register values are temporarily saved to memory (RAM) in a designated storage area called a stack.

Execution Flow Alteration

• Instead of executing the original set of instructions, the processor executes the ISR in response to the interrupt.
• This ensures that the processor can appropriately address the interrupt request.

Stack Management

• During an interrupt, the values stored in registers are pushed onto the stack for safekeeping.
• These values are organized within a stack frame, allowing for easy retrieval once the interrupt handling is complete.

Interrupt Nesting and Handling

• In some cases, an interrupt might occur while another interrupt is being processed, leading to interrupt nesting.
• To manage this scenario, the current interrupt is stacked below the existing one to ensure proper order and completion.

Common Interrupt Priorities

There are typical interrupt priorities for different categories, which include:

Hardware

• Power supply failure
• Power button press

User

• Moving the mouse
• Clicking an icon to open a new program
• Keyboard presses like Ctrl, Alt, Delete

Software

• Software
• Illegal instruction encountered
• Overflow
• Login request
• Crashing

Timer

• Data logging programs which read sensors continuously
• Screen recording applications

Input/output devices

• Signaling of data transfer been completed
• Printer ink supply notifications
• Input devices not responding