Cheatsheet: Amplifiers

1. Amplifier Fundamentals

1.1 Key Parameters

1.2 Amplifier Classifications

2. BJT Amplifier Configurations

2.1 Common Emitter (CE)

• Most common configuration; moderate Z_in, high voltage and current gain
• With emitter degeneration R_E: A_v = -R_C/(r_e + R_E); Z_in = β(r_e + R_E)

2.2 Common Collector (CC) / Emitter Follower

• Buffer amplifier; excellent for impedance matching
• High input impedance, low output impedance

2.3 Common Base (CB)

• High frequency response; good voltage gain, no current gain
• Very low input impedance; used in RF applications

2.4 Configuration Comparison

3. MOSFET Amplifier Configurations

3.1 Common Source (CS)

• With source degeneration R_S: A_v = -g_mR_D/(1 + g_mR_S)
• Extremely high input impedance due to gate insulation

3.2 Common Drain (CD) / Source Follower

• Unity gain buffer; excellent for impedance transformation

3.3 Common Gate (CG)

• High frequency response; low input impedance
• Used in cascode configurations and RF circuits

3.4 Small-Signal Parameters

4. Operational Amplifier Fundamentals

4.1 Ideal Op-Amp Characteristics

• Infinite open-loop gain: A_OL → ∞
• Infinite input impedance: Z_in → ∞
• Zero output impedance: Z_out = 0
• Infinite bandwidth: BW → ∞
• Zero input offset voltage: V_OS = 0
• Infinite CMRR and PSRR
• Zero input bias current: I_B = 0

4.2 Key Real Op-Amp Parameters

4.3 Golden Rules for Ideal Op-Amp Analysis

• Rule 1: No current flows into either input terminal (I₊ = I_- = 0)
• Rule 2: With negative feedback, V₊ = V_- (virtual short)

5. Op-Amp Circuit Configurations

5.1 Inverting Amplifier

• V_out = -(R_f/R_in)V_in
• Non-inverting input grounded; signal applied to inverting input through R_in

5.2 Non-Inverting Amplifier

• V_out = (1 + R_f/R_in)V_in
• Signal applied to non-inverting input; inverting input connected to voltage divider

5.3 Voltage Follower (Unity Gain Buffer)

• A_v = 1 (special case of non-inverting with R_f = 0, R_in → ∞)
• V_out = V_in
• Maximum bandwidth: BW = f_T
• Very high input impedance, very low output impedance

5.4 Summing Amplifier

• V_out = -(R_f/R₁)V₁ - (R_f/R₂)V₂ - ... - (R_f/R_n)V_n
• Inverting configuration with multiple inputs
• If all R_i = R, then V_out = -(R_f/R)(V₁ + V₂ + ... + V_n)

5.5 Difference Amplifier (Differential)

• V_out = (R_f/R_in)(V₂ - V₁) when resistor ratios matched: R_f/R_in = R₄/R₃
• Amplifies difference between two inputs; rejects common-mode signals
• CMRR depends on resistor matching accuracy

5.6 Instrumentation Amplifier

• Three op-amp configuration: two input buffers + one difference amplifier
• A_v = (1 + 2R₂/R_gain)(R_f/R_in)
• Very high input impedance, high CMRR (>100 dB), adjustable gain with single resistor
• V_out = A_v(V₂ - V₁)

5.7 Integrator

• V_out(t) = -1/(R_inC) ∫V_in(t)dt + V_out(0)
• Feedback element is capacitor C
• Gain = -1/(jωR_inC); magnitude decreases with frequency at -20 dB/decade
• Phase shift: -90° (plus 180° from inverting)

5.8 Differentiator

• V_out(t) = -R_fC(dV_in/dt)
• Input element is capacitor C
• Gain = -jωR_fC; magnitude increases with frequency at +20 dB/decade
• Prone to noise amplification at high frequencies; often use series resistor with C for stability

6. Frequency Response & Bandwidth

6.1 Frequency Response Concepts

6.2 Dominant Pole Approximation

• f_-3dB = 1/(2πRC) for single-pole system
• When one pole frequency much lower than others, it dominates frequency response
• Roll-off: -20 dB/decade per pole

6.3 Bode Plot Characteristics

• Single pole: -20 dB/decade slope, -90° phase shift
• Two poles: -40 dB/decade slope, -180° phase shift
• Single zero: +20 dB/decade slope, +90° phase shift
• Phase margin: 180° - |∠A(jω)| at unity gain frequency; PM > 45° for stability
• Gain margin: 1/|A(jω)| at -180° phase; GM > 1 (0 dB) for stability

6.4 Feedback Effects on Bandwidth

• Closed-loop bandwidth: BW_CL = BW_OL(1 + βA_OL) where β is feedback factor
• Gain-bandwidth product remains constant: A_v × BW = f_T
• Negative feedback trades gain for bandwidth

7. Power Amplifiers

7.1 Class A Amplifier

• Transistor conducts for entire input cycle
• Biased at midpoint of load line (Q-point at center)
• Low distortion, low efficiency
• Largest power dissipation at zero signal

7.2 Class B Amplifier (Push-Pull)

• Two transistors: one for positive half-cycle, one for negative half-cycle
• Crossover distortion at zero crossing (V_BE threshold)
• Higher efficiency than Class A; zero quiescent power
• η = (π/4)(V_m/V_CC) where V_m is peak output voltage

7.3 Class AB Amplifier

• Conduction angle between 180° and 360°
• Small bias current to reduce crossover distortion
• Efficiency: 50-70% (between Class A and Class B)
• Most common for audio amplifiers; compromise between efficiency and distortion

7.4 Class C Amplifier

• Transistor conducts for less than half cycle
• Requires resonant tank circuit to reconstruct waveform
• High distortion; used only for RF applications with tuned loads
• Not suitable for linear amplification

7.5 Class D Amplifier (Switching)

• Transistors operate as switches (fully on or fully off)
• Pulse-width modulation (PWM) encodes signal amplitude
• Efficiency: >90% (up to 95-98%)
• Requires output low-pass filter to reconstruct analog signal
• Minimal power dissipation in transistors

7.6 Power Amplifier Comparison

7.7 Heat Sink Design

• θ_JA = θ_JC + θ_CS + θ_SA where J=junction, C=case, S=sink, A=ambient
• Maximum junction temperature: T_J = T_A + P_Dθ_JA
• Required thermal resistance: θ_SA = (T_J,max - T_A)/P_D - θ_JC - θ_CS
• Thermal resistance units: °C/W

8. Feedback Amplifiers

8.1 Feedback Fundamentals

• Negative feedback: loop gain βA is subtracted from input
• Positive feedback: loop gain βA is added to input (can cause oscillation)

8.2 Effects of Negative Feedback

8.3 Feedback Topologies

8.4 Stability and Oscillation

• Barkhausen Criterion for oscillation: |βA| = 1 and ∠(βA) = 0° (or 360°)
• Nyquist Stability Criterion: system stable if (-1, j0) point not encircled by Nyquist plot
• Phase Margin (PM): 180° + ∠(βA) at |βA| = 1; PM > 45° for adequate stability
• Gain Margin (GM): 20log₁₀(1/|βA|) at ∠(βA) = -180°; GM > 10 dB recommended
• Compensation techniques: dominant-pole, lead, lag, lag-lead

9. Differential Amplifiers

9.1 Basic Differential Pair

• V_out,diff = A_d(V₁ - V₂)
• Tail current source I_EE or I_SS improves CMRR
• Single-ended output: half the differential gain

9.2 Active Load Differential Amplifier

• Current mirror replaces resistive loads
• A_d = g_m(r_o||r_oc) where r_oc is output resistance of current mirror
• Much higher gain than resistive load (50-80 dB vs 20-40 dB)
• Better DC matching and smaller chip area

9.3 Differential Mode vs Common Mode

• Differential input: V_id = V₁ - V₂
• Common-mode input: V_icm = (V₁ + V₂)/2
• V₁ = V_icm + V_id/2; V₂ = V_icm - V_id/2
• V_out = A_dV_id + A_cmV_icm

10. Multistage Amplifiers

10.1 Cascaded Amplifier Gain

• Total voltage gain: A_v,total = A_v1 × A_v2 × ... × A_vn
• In dB: A_v,total(dB) = A_v1(dB) + A_v2(dB) + ... + A_vn(dB)
• Loading effects must be considered between stages
• Overall bandwidth limited by stage with smallest BW

10.2 Cascode Amplifier

• CE (or CS) stage followed by CB (or CG) stage
• A_v ≈ -g_m1(r_o1||r_in2)g_m2R_L ≈ -g_m²r_oR_L
• High gain, wide bandwidth, excellent isolation
• Miller effect minimized (low C_in)
• Output resistance: R_out ≈ g_m2r_o1r_o2 (very high)

10.3 Darlington Pair

• Two BJTs in series: collector of Q1 to collector of Q2, emitter of Q1 to base of Q2
• Current gain: β_total ≈ β₁β₂
• Input impedance: Z_in = β₁β₂(r_e2 + R_E)
• V_BE,total = V_BE1 + V_BE2 ≈ 1.4V
• Used for very high current gain applications

10.4 Buffer Stages

• Emitter follower (BJT) or source follower (FET) provides impedance transformation
• Placed between high-Z source and low-Z load
• Prevents loading of previous stage
• Unity voltage gain, high current gain

11. Distortion and Noise

11.1 Types of Distortion

11.2 Noise Sources

11.3 Noise Figure and SNR

• Signal-to-Noise Ratio: SNR = P_signal/P_noise or 10log₁₀(P_S/P_N) dB
• Noise Figure: NF = SNR_in/SNR_out or NF(dB) = 10log₁₀(SNR_in/SNR_out)
• Equivalent input noise: e_ni² = 4kTR_SΔf + e_n,amp²
• Cascaded noise figure: F_total = F₁ + (F₂-1)/G₁ + (F₃-1)/(G₁G₂) + ...

11.4 Dynamic Range

• Dynamic Range = 20log₁₀(V_max/V_min) where V_min limited by noise, V_max by distortion
• Spurious-Free Dynamic Range (SFDR): ratio of fundamental to largest spurious signal
• Signal-to-Noise-and-Distortion Ratio: SINAD = P_signal/(P_noise + P_distortion)

12. Current Sources and Mirrors

12.1 BJT Current Mirror

• Basic mirror: I_out/I_ref = 1 (assuming β >> 1)
• Actual ratio: I_out/I_ref = β/(β+2) ≈ 1 - 2/β
• Output resistance: r_out = r_o = V_A/I_C
• Ratio scaling: I_out/I_ref = (A_E,out/A_E,ref) for matched transistors

12.2 MOSFET Current Mirror

• Basic mirror: I_out/I_ref = (W/L)_out/(W/L)_ref
• Both transistors must be in saturation: V_DS ≥ V_GS - V_th
• Output resistance: r_out = r_o = 1/(λI_D)
• Better matching than BJT at low currents

12.3 Improved Current Mirrors

12.4 Widlar Current Source

• V_Tln(I_ref/I_out) = I_outR_E
• Allows generation of small currents (μA) from larger reference (mA)
• Emitter resistor R_E only on output transistor

13. Practical Design Considerations

13.1 Biasing Techniques

• Stability factor: S = dI_C/dI_CO; lower is better
• Design rule: I₂ ≈ 10I_B where I₂ is current through R₂

13.2 Coupling and Bypass Capacitors

• Coupling capacitor: X_C <>_in at lowest frequency; C ≥ 10/(2πf_LR_in)
• Bypass capacitor: X_C <>_E at lowest frequency; typically C ≥ 10/(2πf_LR_E)
• Power supply decoupling: 0.1μF ceramic + 10-100μF electrolytic in parallel

13.3 Input/Output Impedance Matching

• Maximum power transfer: R_L = R_S (impedance matched)
• Maximum voltage transfer: R_L >> R_S (high Z_in desired)
• Maximum current transfer: R_L <>_S (low Z_in desired)
• Impedance transformation: n² = Z₁/Z₂ for transformer with turns ratio n

13.4 Temperature Effects

• BJT: V_BE decreases ~2 mV/°C; I_CO doubles every 10°C
• MOSFET: V_th decreases ~2 mV/°C; μ decreases with temperature
• Thermal runaway prevention: use emitter/source degeneration resistors
• Temperature coefficient of β: approximately +0.5%/°C for BJT

13.5 Slew Rate Limitations

• Maximum frequency without distortion: f_max = SR/(2πV_p) where V_p is peak amplitude
• Full power bandwidth: f_FP = SR/(2πV_out,max)
• Slew rate limited by charging current: SR = I_max/C_comp