Addressing Modes - Computer Architecture & Organisation (CAO) - Computer

Addressing Mode

An addressing mode specifies the rule used to interpret or to modify the address field of an instruction before the operand is referenced. Addressing modes provide the CPU and the programmer with flexible ways to locate operands in registers or memory and to support programming structures such as pointers, indexing, loop counters and stack operations.

Purposes of addressing modes

• Provide programming versatility: support pointers to memory, counters for loop control, indexing of arrays and other facilities for the programmer.
• Reduce the number of bits required in an instruction's address field by using registers or mode fields instead of full addresses.
• Allow the instruction format to indicate whether the address field refers to memory or to a processor register.
• Support modes that require no explicit address field (for example, implied and immediate modes), saving instruction space and execution time.
• Enable compact encodings where operation and addressing information are encoded together so the mode field helps the CPU locate the operand efficiently.

Effective address (EA)

• The effective address (EA) is the memory address obtained after applying the computation required by the chosen addressing mode.
• For most memory-referencing instructions, the EA is the address that will be used to read from or write to memory.

Common addressing modes (overview)

• Implied addressing mode
• Immediate addressing mode
• Register direct addressing mode
• Register indirect addressing mode
• Auto-increment / auto-decrement addressing mode
• Direct (absolute) addressing mode
• Indirect addressing mode
• Displacement (base + offset) addressing mode
• Relative addressing mode
• Indexed addressing mode
• Base register addressing mode
• Stack addressing mode

Implied addressing mode

In the implied mode the operand is implicitly specified by the instruction itself; no address or operand field is required. The instruction definition identifies the operand, so the instruction needs neither an address nor an immediate value.

Example: the instruction CMA (complement accumulator) implicitly uses the accumulator as the operand; the accumulator is implied and need not be named.

Immediate addressing mode

In immediate mode the operand value is encoded directly in the instruction's operand field instead of providing an address. The CPU uses this literal value as the operand.

Immediate instructions are useful for loading registers with constants or for arithmetic with a fixed constant operand.

Example: MVI B, 50H - the constant 50H is part of the instruction and used directly as the operand.

Register direct addressing mode

In register direct mode the operand resides in a CPU register. The instruction's register field selects which register contains the operand. No memory reference is required to access the operand.

Example: MOV A, B - both source and destination operands are CPU registers.

Advantages: fast access because memory is not referenced. Disadvantages: limited operand space because the number of registers is small.

Register indirect addressing mode

In register indirect mode the instruction specifies a register whose contents are the memory address of the operand. The register contains a pointer to memory rather than the operand itself. The CPU performs a memory access using the address stored in the register.

Before using register indirect instructions, the programmer must place the desired memory address into the specified register (typically via a prior instruction).

Example: LDAX B - load the accumulator from the memory address contained in register pair B.

Advantage: larger effective address range while using few bits in the instruction (select register instead of a full memory address). Disadvantage: extra memory access is required to reach the operand.

Auto-increment and auto-decrement addressing mode

This mode is a variation of register indirect addressing in which the register used as a pointer is automatically incremented or decremented either before or after accessing memory.

Auto-increment/decrement is convenient when traversing arrays or tables: after each memory access the pointer register is updated automatically to point to the next element, reducing the number of explicit instructions required to update the pointer.

Some CPU architectures provide dedicated instructions that perform the memory access and update the pointer in hardware; on other architectures, software must update the pointer explicitly.

Direct (absolute) addressing mode

In direct (or absolute) addressing mode the effective address is exactly the address part of the instruction. The operand resides in memory and the instruction contains its memory address.

Example: LDA 4000H - load the accumulator from memory location 4000H specified directly in the instruction.

Indirect addressing mode

In indirect addressing mode the address field of the instruction specifies a memory location that contains the effective address (EA). The CPU must perform an extra memory access to fetch the EA and then a second memory access to read or write the operand.

Sequence: fetch instruction → use instruction's address field to read memory location M → fetch EA from M → use EA to access operand.

Displacement (base + offset) addressing mode

This mode combines direct addressing and register-indirect addressing: the address field in the instruction provides an offset which is added to the contents of a specified register (the base register) to produce the effective address.

It is particularly powerful for addressing fields inside data structures or records where a base register points to the start of a structure and the instruction provides a small offset to reach a particular field.

Relative addressing mode

In relative addressing mode the content of the program counter (PC) is added to the address (offset) part of the instruction to obtain the effective address. The offset is usually a signed number (positive or negative), allowing jumps both forward and backward relative to the current instruction location.

Relative addressing is commonly used for branch and jump instructions and supports position-independent code because the branch target is given relative to current execution point.

Indexed addressing mode

In indexed addressing the content of an index register (XR) is added to the address (offset) part of the instruction to compute the effective address. The index register usually holds a displacement that steps through successive elements of an array or table.

Typical use: accessing array element i by storing the base address of the array in the instruction and using the index register to select the element offset.

Base register addressing mode

In base register addressing the content of a base register (BR) is added to the instruction's address part to produce the effective address. This is conceptually the same as indexed addressing but the register is designated for relocation rather than for element indexing.

Base register addressing is commonly used to support program relocation: a program and its data can be loaded at different memory segments by adjusting the base register at load time rather than changing the code.

Stack addressing mode

The stack is a last-in, first-out (LIFO) storage structure implemented as a contiguous area of memory together with a stack pointer (SP) register. Stack addressing uses the SP to refer to the top of stack for push, pop and subroutine call/return operations.

The stack pointer is updated automatically by the hardware or by explicit stack instructions; stack addressing greatly simplifies management of return addresses, local variables and parameter passing in nested subroutine calls.

Example: Evaluating addressing modes

The following figures illustrate examples and evaluations of addressing modes and how effective addresses are calculated for sample instructions. Study them to see how the EA is formed for different modes and how many memory references each requires.

Notes, advantages and trade-offs

• Register modes (direct and indirect) are faster because they avoid or reduce memory accesses; their disadvantage is limited operand space because register count is small.
• Direct and absolute modes are simple and straightforward but require enough bits in the instruction to hold a full memory address, increasing instruction length.
• Displacement, indexed and base modes give flexible addressing with compact instruction encodings and are well suited to arrays, records and relocatable code.
• Indirect modes provide large address spaces with compact encodings but incur additional memory references and thus execution overhead.
• Immediate and implied modes save instruction space and execution time when the operand is a constant or an implied register; they cannot address arbitrary memory locations.
• Choice of addressing mode affects instruction length, execution speed, and the ease of expressing program structures such as arrays, pointers, loops and relocatable code.

Summary: Addressing modes are the mechanisms by which a CPU instruction specifies where its operands are located. Understanding each addressing mode, its effective address calculation and its trade-offs helps in writing efficient assembly code and designing instruction sets that balance compactness, speed and programming convenience.