Microinstruction Format | Computer Architecture & Organisation (CAO) - Computer Science Engineering (CSE) PDF Download

Table of Contents
1. Computer Instruction Format
2. Microinstruction Format (Control Memory)
3. Microoperations
4. Condition and Branch Field
5. Typical Microinstruction Sequencing (Conceptual Example)
6. Design Notes and Constraints
7. Summary
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Computer Instruction Format

The format used to represent a computer instruction is shown in the referenced figure for the machine. The instruction word is divided into three logical fields that determine how the processor decodes and executes the instruction.

• I field: a 1-bit field that specifies whether indirect addressing is used (commonly called the I bit).
• Opcode: a 4-bit operation code that selects which memory-reference operation or instruction is to be performed.
• Address field: an 11-bit field that supplies the address used by the instruction (effective address or operand address depending on the I bit and addressing mode).
• The referenced figure illustrates this layout and an accompanying figure lists four example memory-reference instructions out of the 16 possible opcodes for this 4-bit opcode field.

Microinstruction Format (Control Memory)

The microinstruction format used in the control memory (microprogram store) arranges the control word into fields that select microoperations, test conditions, determine branching, and supply branch addresses.

• The microinstruction length shown is 20 bits in total.
• The 20 bits are partitioned into the following fields: F1, F2, F3, CD, BR, and AD.
• The three fields F1, F2, and F3 specify microoperations for the computer; each field is encoded to select a microoperation or to specify no operation.
• The CD field selects a condition on status bits to be tested by a conditional branch.
• The BR field specifies the type of branch or next-address selection mechanism.
• The AD field contains the branch address to be used when the branch type requires an explicit address.
• A simple bit-count check shows that if each F field uses 3 bits and CD and BR use 2 bits each, the remaining bits of the 20-bit microinstruction are available for the AD field; the exact bit allocation depends on the implementation but the functional partition above is the important conceptual point.

Microoperations

The microoperations carried out by the datapath are selected by the F1, F2, and F3 fields in a microinstruction. These fields are encoded so that each can specify one microoperation or specify no operation.

• Each of the three fields (F1, F2, F3) is typically 3 bits wide and is encoded to select from several possible microoperations; with 3 bits, up to eight codes are possible, one of which (commonly 000) is used to indicate no operation.
• No more than one microoperation may be selected from each field, therefore a single microinstruction can specify at most three simultaneous microoperations (one from F1, one from F2, and one from F3).
• If fewer than three microoperations are required by a microinstruction, the remaining field(s) use the code for no operation (for example 000).
• Two or more simultaneously specified microoperations must not conflict. A conflict arises if the microoperations attempt to drive the same register or functional unit at the same time or if they require mutually exclusive use of a resource. For example, selecting two microoperations that both write different values to the same register in the same clock cycle is invalid.
• Each microoperation is normally defined by a register-transfer statement and is given a symbolic name or symbol that is used in a symbolic microprogram; the set of microoperations and their encodings are listed in the implementation's microoperation table (referred to as Table 3-1 in the referenced material).

Condition and Branch Field

The microinstruction format uses the condition and branch fields to control the flow of microinstructions in the control memory (microprogram sequencing).

• The CD field typically consists of two bits and is encoded to select one of four status-bit conditions to be tested; the specific conditions and their encodings are listed in the microprogram reference table (Table 3-1).
• The BR field typically consists of two bits and, together with the AD field, determines the address of the next microinstruction to be executed.
• The common types of branch controlled by the BR field include conditional branch (branch when the selected CD condition is true), unconditional branch, and other sequencing choices such as next sequential or return variants-exact meanings depend on the implementation's encoding.
• Jump and call operations use the CD field to decide whether the branch is taken. The call operation is similar to a jump except that a call microinstruction also stores the return address in a dedicated subroutine register (often named SBR), enabling a later return to the instruction following the call.
• Some encodings of the BR field select operations that are independent of the CD and AD fields; these cover cases such as unconditional sequencing or hardware-controlled returns.

Typical Microinstruction Sequencing (Conceptual Example)

1. Fetch the next microinstruction from control memory at the current microprogram counter (MPC).
2. Decode the microinstruction fields: determine the microoperations from F1-F3, read the CD and BR encodings, and fetch the AD field if required.
3. Execute the microoperations selected by F1, F2 and F3 simultaneously if they are non-conflicting; if any field is coded 000, that field specifies no operation for this cycle.
4. Evaluate the condition selected by the CD field against the processor status bits (if a conditional branch is encoded).
5. Choose the next microinstruction address according to the BR field and the result of the condition evaluation; if a call is executed, save the return address into SBR before branching to AD.
6. Update the microprogram counter and repeat the cycle.

Design Notes and Constraints

• Field widths and exact encodings vary by machine; the functional roles described here are a general model used in many microprogrammed controllers.
• The AD field width limits the directly addressable size of the microprogram; larger microprograms require wider AD fields or additional sequencing mechanisms.
• Careful microoperation design is required to avoid conflicts and to make efficient use of the F1-F3 fields; where more simultaneous microoperations are required, additional fields or wider fields are used in other designs.
• Using a symbolic microprogram (symbols for microoperations and labels for addresses) improves readability and maintainability; the symbolic microprogram is translated into the binary control memory image for the implementation.

Summary

Microinstruction format organises control information into fields that select microoperations, test conditions, control branching, and provide branch addresses. The computer instruction format (machine instruction) is separate and supplies opcode, addressing, and an indirect bit. Correct encoding of microoperations and careful sequencing via the CD, BR and AD fields are the basis of reliable microprogram control and of implementing higher-level machine instructions using sequences of microinstructions.