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Electronics and Communication Engineering (ECE) Exam  >  Electronics and Communication Engineering (ECE) Test  >  GATE ECE (Electronics) Mock Test Series 2027  >  Test: Electronic Devices - 5 - Electronics and Communication Engineering (ECE) MCQ

GATE ECE (Electronics) Test: Electronic Devices - 5 Free Online Test 2026


MCQ Practice Test & Solutions: Test: Electronic Devices - 5 (10 Questions)

You can prepare effectively for Electronics and Communication Engineering (ECE) GATE ECE (Electronics) Mock Test Series 2027 with this dedicated MCQ Practice Test (available with solutions) on the important topic of "Test: Electronic Devices - 5". These 10 questions have been designed by the experts with the latest curriculum of Electronics and Communication Engineering (ECE) 2026, to help you master the concept.

Test Highlights:

  • - Format: Multiple Choice Questions (MCQ)
  • - Duration: 30 minutes
  • - Number of Questions: 10

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Test: Electronic Devices - 5 - Question 1
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The figure shows the VTC characteristics of an NMOS inverter with three varying resistive loads (R).


The correct statement is:

Detailed Solution: Question 1

  • As Vi is increased voltage drop across RL increases and V0 decreases.
  • The sharpness of the transition region increases with the increasing load resistance.
  • Hence R3 > R2 > R1.

*Answer can only contain numeric values
Test: Electronic Devices - 5 - Question 2
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Assume that the zero for electrostatic potential is in the semiconductor bulk at large x and that there is no metal semiconductor work function difference. The relative dielectric constant for the oxide is ϵr = 11.8. If the intrinsic concentration is 1010/cm3. The doping density ND is _____ × 1017/cm3 (KT = 0.026 V)


Detailed Solution: Question 2

The doping density is given by:

= 1010 e(0.437/0.026)

= 1.99 × 1017

Clear all your doubts with EduRev
Test: Electronic Devices - 5 - Question 3
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The figure shows MOS capacitor variation with applied gate voltage for n-type body/substrate.

The flat band voltage is:

Detailed Solution: Question 3

  • Flat band voltage is the voltage where there is no charge present in oxide or oxide-semiconductor interface. i.e. No thickness of channel
  • Cox is constant and decreased subsequently
    Note: Here, VG is negative (for PMOS)
  • Hence, voltage is decreased from positive (VFB) to negative.

*Answer can only contain numeric values
Test: Electronic Devices - 5 - Question 4
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The insulator capacitance Ci of an ideal MOS capacitor with 10-nm gate oxide (εr = 3.9) on p-type Si with Na = 1016 cm-3 is ________ × 10-7 F/cm2


Detailed Solution: Question 4

The insulator capacitance is the capacitance under strong accumulation

= 3.453 × 10-7 F/cm2

Test: Electronic Devices - 5 - Question 5
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Which of the following curves represents the correct C – V characteristics of an NMOS transistor having an oxide layer thickness of 10 nm and a maximum depletion thickness of 100 nm. [Assume ϵs = permittivity of semiconductor, ϵox = permittivity of oxide and 
 

Detailed Solution: Question 5

Given, tox = 10 nm, d = 100 nm

Cmin = series combination of Cox and Cdep

= 0.09 ϵA

Test: Electronic Devices - 5 - Question 6
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The mobility of hole is 0.4 times the mobility of electron. What must be the ratio of width of n-channel to p-channel MOSFET if they are to have equal drain currents when operated in saturation mode with same magnitude of overdrive voltage:

Detailed Solution: Question 6

ID-n = ID-p

μn Wn = μp Wp

Test: Electronic Devices - 5 - Question 7
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The circuit shown uses an NMOS transistor to implement a current source. For the transistor VTN = 1V and =12.5 uA/V2. The required value of VGS to get IDC = 25 μA and corresponding compliance voltage is:

Detailed Solution: Question 7


2 = (VGS - 1)2‑
VGS = √2 + 1 = 2.414 V

To function as a current source, the transistor must be in saturation or VDS > VDS (sat).

VDS (sat) = VGS - VTN

= 2.414 – 1

= 1.414.

Hence compliance voltage = 1.414 V.
Compliance voltage is the minimum voltage required to achieve the desired performance.

*Answer can only contain numeric values
Test: Electronic Devices - 5 - Question 8
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The output resistance R0 of the NMOS circuit if ID = 0.5 mA, λ = 0.02 V-1,   _____ kilo ohms.


Detailed Solution: Question 8

The small signal model with a test voltage Vx is shown.

The output resistance is given by:
 

From the circuit, Vgs = Vx

Applying KCL:

Test: Electronic Devices - 5 - Question 9
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For a MOSFET with gate plate area 0.5 × 10-2 cm2 and oxide layer thickness 80 nm, the value of MOS capacitance and its break down voltage are: (assume relative di-electric constant of sio2, ϵr = 4 and ϵ0 = 8.854 × 10-14 F/cm and dielectric strength of sio2 film is 5 × 106 V/cm)

Detailed Solution: Question 9

Given gate plate area, which is also MOS capacitor area A = 0.5 × 10-2cm2

Oxide layer thickness tox = 80 nm

The value of MOS capacitance:
 

= 0.22 μF

Dielectric breakdown happens of field  greater than dielectric strength (5 × 106 V/cm)

V = 5 × 108 × 80 × 10-9 V = 40V

*Answer can only contain numeric values
Test: Electronic Devices - 5 - Question 10
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In the circuit shown in Figure, Transistors are characterized by  and λ = 0

The output voltage V0 is _______V


Detailed Solution: Question 10

Gate is connected to drain Both Transistor are in Saturation.

For M1 Transistor:

⇒ (V - 8)2 = 4
⇒ V - 8 = ± 2

(i) Taking +ve, V = 8 + 2 = 10 V (Not Possible)
(ii) Taking -ve, V = 8 - 2 = 6 V

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About this Electronics and Communication Engineering (ECE) Practice Test

This test contains 10 MCQs on Electronic Devices - 5 with detailed solutions for each question. It is part of the GATE ECE (Electronics) Mock Test Series 2027 course on EduRev, designed to align with the current Electronics and Communication Engineering (ECE) syllabus. Each solution explains not just the correct answer but also gives you an understanding of the topic — not just to attempt the question but also help you prepare for the exam with practice.

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