Priority Encoders - Free MCQ Practice Test with solutions, GATE EE Analog

Priority encoder:-

If more than one input is high then encoder produce an output which may not be correct to overcome this we use priority encoder.

We considered one more output, V in order to know, whether the code available at outputs is valid or not.

If at least one input of the encoder is ‘1’, then the code available at outputs is a valid one. In this case, the output, V will be equal to 1.

If all the inputs of encoder are ‘0’, then the code available at outputs is not a valid one. In this case, the output, V will be equal to 0.

Analysis:-

Logic shown in given figure will work as

Priority encoder (4 × 2)

Inputs = D₃, D₂, D₁, D₀

Output:

y = D₃ + D₂’ D₁

X = D₃ + D₂

V = D₃ + D₂ + D₁ + D₀

A 4 to 2 Priority Encoder takes 4 input bits and produces 2 Output bits. The truth Table of a 4 to 2 Priority Encoder is as shown:

We use Karnaugh Map to minimize the logic for B as shown:

B = I̅₂I₁ + I₃

Similarly the expression for A in obtained using K-map as shown:

A = I₂ + I₃

So, the given circuit is a priority Encoder only.

For a simple decimal → BCD encoder, we find A is true for 1, 3, 5, 7, 9

where A → LSB of BCD code is:

A = 1 + 3 + 5 + 7 + 9B

= 2 + 3 + 6 + 7C

= 4 + 5 + 6 + 7 MSB D = 8 + 9

Now, with 7 given priority over 0, 2 & 5, the logic will be A is HIGH if 1 is HIGH & 2, 4, 6, 8 are LOW

A is HIGH if 3 is HIGH & 4, 6, 8 are LOW

A is HIGH if 5 is HIGH & 6, 8 are LOW

A is HIGH if 7 is HIGH & 8 is LOW

A is HIGH if 9 is HIGH

So, logic equation

Since the given truth table has more than one output and the number of outputs is less than number of inputs, the given logic function represents priority encoder. It checks the highest priority high bit encountered in input bits.

The above circuit is none of the above mentioned three circuits, viz, 3 bit priority generator, full subtractor or 3 bit priority encoder.

A multiplexer or MUX is a combination circuit that contains more than one input line, one output line and more than one selection line. Whereas, an encoder is also considered a type of multiplexer but without a single output line and without any selection lines.

An encoder is a combinational circuit encoding the information of 2ⁿ input lines to n output lines, thus producing the binary equivalent of the input. If two inputs are active on a priority encoder, the input of higher value will be coded in the output.

Here, X represents the priority encoder output.

Y represents the valid output corresponding to the highest order active input.

• In a four-line to two-line priority encoder, the goal is to encode the highest order active input among four lines into a two-bit output.
• X = D₂+D₃
• This equation means that the output X is active (HIGH) when either D₂ or D₃ is active.
• It indicates the encoding of the higher-priority input.
• Y = D₁D̅₂+D₃
• Y is the two-bit output. It is formed by combining D₁D₂ if both D₁ and D₂ are active, or by using D₃ if D₃ is active alone. This represents the highest-order active input.
• X = D₂+D₃  
• Y = D₁D̅₂+D₃

Here, option 1 is correct.

From the given logic circuit,

V = D₀ + D₁ + D₂ + D₃

y₀ = D₃ + D₁D̅₂

y₁ = D₂ + D₃

The truth table for the given logic circuit is given below.

From the above truth table, it is clear that When D₃ = 1, the output (Y₁ Y₀) = (11)₂ = (3)₁₀ irrespective of other inputs.

For D₃ = 0 and D₂ = 1, the output Y₁ Y₀ = (10)₂ = (2)₁₀ irrespective of other inputs.

For D₃ = D₂ = 0 and D₁ = 1, the output

Y₁Y₀ = (01)₂ = (1)₁₀ irrespective of other inputs.

The output will be Y₁Y₀ = (00)₂ = (0)₁₀ only

When D₃ = D₂ = D₁ = 0 and D₀ = 1.

Therefore, the given logic circuit is a priority encoder with a priority order D₃ > D₂ > D₁ > D₀

Formula:

The total time taken by the for ‘n’ bit ripple carry adder is

T_d = (n – 1) t_c + Maximum(t_c, t_s)

t_c = delay for carry through a single flip flop.

t_s = delay for sum

Data:

Each full adder takes 34 ns for computing

From this, Maximum(t_c, t_s) = t_s = 34 ns

T_d = 90 ns.

n = 8

Calculation:

T_d = (n – 1) t_c + Maximum(t_c, t_s)

90 = (8 – 1)t_c + 34

7t_n = 56 ns.

∴ t_n = 8 ns.

Time taken by each full adder to find carry is 8 ns.

Important Point:

If Maximum(t_c, t_s) = t_c then answer is 11.25 which is not in option

∴ Maximum(t_c, t_s) has to be t_s